4 Silicon Plasmonics
151
While plasmonics may become an attractive platform for supporting the operation
of CMOS electronics, it is not expected to fully replace the silicon integrated circuits
in the foreseeable future. The maturity, reliability, and wealth of electronic devices
as well as the massive accumulated know-how in silicon science and technology—
these are all clear indicators that silicon is here to stay, at least to some degree.
Therefore, a growing effort is recently devoted for the development of a new platform,
combining the concepts of silicon photonics with the advantages offered by the use
of plasmonics. This hybrid approach, now coined as “silicon plasmonics” is the focus
of this chapter. Along the text we review the recent achievements in the field and
provide a forecast for future progress.
4.2 Silicon Plasmonics Components
4.2.1 Motivation
A modern optoelectronic circuit consists of passive and active devices (e.g. optical on chip waveguides or fibers, splitters, combiners, couplers, filters, modulators,
switches, light sources and detectors). The great challenge of the silicon plasmonic
platform is to facilitate the realization and the integration of such components on a
chip, while mitigating challenges as loss and nanoscale confinement. In the following
sub sections we review the current state of the art in this field with special emphasis
on our work at the Hebrew University of Jerusalem.
4.2.2 Passive Devices
A major passive building block in an on chip optoelectronic circuit is obviously
the optical waveguide linking between the various on chip components. Over the
years, there has been a tremendous progress in the field of silicon based waveguides.
It is now possible to routinely demonstrate light guiding such silicon waveguides
having a submicron cross sectional dimensions. Typical propagation loss values are
in the range of 2 dB/cm although it is possible to reduce loss even further e.g. by
defining a waveguide structure by local oxidation of silicon (LOCOS) rather than
using aggressive reactive ion etching (RIE) [3, 4]. While propagation loss of silicon
waveguides is no longer a major concern, mode size is still far too large compared
with typical dimensions of on chip electronic components. To further reduce the
mode size, plasmonic guiding should be considered. Naively, one would think of
constructing a silicon plasmonic waveguide by depositing a metal layer on top of
a silicon waveguide. Unfortunately such a structure does not provide a satisfactory
solution. Figure 4.1 (top) shows the dispersion diagram of an SPP mode propagating
along a single silver-silicon interface, whereas Fig. 4.1 (bottom) shows corresponding
151
While plasmonics may become an attractive platform for supporting the operation
of CMOS electronics, it is not expected to fully replace the silicon integrated circuits
in the foreseeable future. The maturity, reliability, and wealth of electronic devices
as well as the massive accumulated know-how in silicon science and technology—
these are all clear indicators that silicon is here to stay, at least to some degree.
Therefore, a growing effort is recently devoted for the development of a new platform,
combining the concepts of silicon photonics with the advantages offered by the use
of plasmonics. This hybrid approach, now coined as “silicon plasmonics” is the focus
of this chapter. Along the text we review the recent achievements in the field and
provide a forecast for future progress.
4.2 Silicon Plasmonics Components
4.2.1 Motivation
A modern optoelectronic circuit consists of passive and active devices (e.g. optical on chip waveguides or fibers, splitters, combiners, couplers, filters, modulators,
switches, light sources and detectors). The great challenge of the silicon plasmonic
platform is to facilitate the realization and the integration of such components on a
chip, while mitigating challenges as loss and nanoscale confinement. In the following
sub sections we review the current state of the art in this field with special emphasis
on our work at the Hebrew University of Jerusalem.
4.2.2 Passive Devices
A major passive building block in an on chip optoelectronic circuit is obviously
the optical waveguide linking between the various on chip components. Over the
years, there has been a tremendous progress in the field of silicon based waveguides.
It is now possible to routinely demonstrate light guiding such silicon waveguides
having a submicron cross sectional dimensions. Typical propagation loss values are
in the range of 2 dB/cm although it is possible to reduce loss even further e.g. by
defining a waveguide structure by local oxidation of silicon (LOCOS) rather than
using aggressive reactive ion etching (RIE) [3, 4]. While propagation loss of silicon
waveguides is no longer a major concern, mode size is still far too large compared
with typical dimensions of on chip electronic components. To further reduce the
mode size, plasmonic guiding should be considered. Naively, one would think of
constructing a silicon plasmonic waveguide by depositing a metal layer on top of
a silicon waveguide. Unfortunately such a structure does not provide a satisfactory
solution. Figure 4.1 (top) shows the dispersion diagram of an SPP mode propagating
along a single silver-silicon interface, whereas Fig. 4.1 (bottom) shows corresponding