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shift from present integrated circuit technology towards what is coined “post CMOS
era”. The need for future emerging technologies that could play a role in shaping
this post CMOS era is now well recognized by the electronics industry. For example,
the report of the international technology roadmap for semiconductors indicates the
following: “Proposed post-CMOS replacement devices are very different from their
CMOS counterparts, and often pass computational state variables (or tokens) other
than charge. Alternative state variables include collective or single spin, excitonic,
plasmonic, photonic,… ” [1].
Among the variety of potential technological solutions, photonics seems to be a
promising candidate since it offers advantages in bandwidth, delay, cross-talk and
power. Indeed, optics is already being used for long range communication, and is now
being considered for shorter range applications including board-to-board and even
chip-to-chip level [2]. In particular, the challenge of constructing short range photonics based communication can be mitigated by the use of the technology of silicon photonics. Over the years, large variety of silicon photonics based devices were demonstrated, including waveguides, splitters, combiners, filters, modulators, switches, and
more. The wealth of silicon photonics devices and components, together with the
mature CMOS compatible fabrication technology makes the field of silicon photonics an excellent candidate for being integrated in short range communication systems
already in the very near future.
Side by side with the great promise of silicon photonics, it has also several limitations one needs to overcome in order to facilitate on chip integration of photonic
and electronic systems. In particular, a major concern is the dimensionality mismatch
between silicon photonics based devices and electronics components. A fundamental
reason for this mismatch is the concept of diffraction limit. While electronic structures are nowadays much below 100 nm in size and are not limited by the wavelength
of electron, being orders of magnitude smaller, the photonic mode size in dielectric
structures cannot be scaled down much below the wavelength of light in the material.
Indeed, typical dimensions of modern silicon waveguides are in the order of 500 nm
wide and about 250 nm thick. This size mismatch between photonics and electronics is a major barrier, preventing the integration of silicon photonic devices such as
waveguides, optical switches and optical modulators with electronic components on
the same chip.
Recent progress in plasmonics may allow circumventing this obstacle. Plasmonic
modes (either surface plasmon polaritons, or localized plasmons) can be confined
at the nanoscale owing to the possibility of having short effective wavelength (in
the U.V and even in the X-ray) at optical frequencies. An example for high mode
confinement is the use of metal-insulator-metal (MIM) structures, which does not
exhibit a cutoff for the fundamental mode. Therefore, by reducing the width of the
insulator section high mode confinement is obtained because the metal does not allow
the mode to extend much beyond its boundary with the insulator. The combination
of nanoscale confinement and high frequencies makes the field of plasmonics an
attractive candidate for “bridging the gap” between photonic components and modern
electronics.
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