transfer (30.5 μW/MHz @25 MHz), the total active power is 88.4 μW/MHz
@25 MHz (Fig. 13). Hence, the total energy of the CRC32 execution by using
FPGA accelerator became one third of that without FPGA. The demonstrated result
of CRC32 ensures a high energy efficiency in applications including bit and logic
calculation, e.g. encryption and pattern matching.
7 Conclusions
A low-power nonvolatile programmable logic (or FPGA) is proposed for energyconstrained applications. A 64 Â 64 programmable-logic cell array includes a 4.6Mbit CAS for the routing switch and configuration memory. A 16-bit ALU, which is
a building block of the micro-controller unit, is implemented to compare the speed
and power consumption with a state-of-the-art low power FPGA. The atomic-switch
based FPGA exhibited 30% dynamic power reduction and 2.5 times faster operation
in the low-voltage region. The operations in harsh environments are also demonstrated. By using atomic-switch based FPGA as CPU accelerator, both programmability and energy efficiency can be achieved. When a software process in the CPU is
offloaded to NPL, the nine times faster processing speed and three times higher
energy efficiency are realized.
Acknowledgments A part of this work was supported by NEDO. A part of the device processing
was operated by AIST, Japan.
Power consumpon (mW)
Frequency (MHz)
57.9uW/MHz
30.5uW/MHz
CPU/RAM/ROM
(inc. data transfer)
CPU/RAM/ROM/FPGA
2.0
1.5
1
0.5
0 5
10
15
20
25
30
Fig. 13 Active power
consumption of with FPGA
in open circle and without
FPGA in solid diamond
30
T. Sakamoto et al.
@25 MHz (Fig. 13). Hence, the total energy of the CRC32 execution by using
FPGA accelerator became one third of that without FPGA. The demonstrated result
of CRC32 ensures a high energy efficiency in applications including bit and logic
calculation, e.g. encryption and pattern matching.
7 Conclusions
A low-power nonvolatile programmable logic (or FPGA) is proposed for energyconstrained applications. A 64 Â 64 programmable-logic cell array includes a 4.6Mbit CAS for the routing switch and configuration memory. A 16-bit ALU, which is
a building block of the micro-controller unit, is implemented to compare the speed
and power consumption with a state-of-the-art low power FPGA. The atomic-switch
based FPGA exhibited 30% dynamic power reduction and 2.5 times faster operation
in the low-voltage region. The operations in harsh environments are also demonstrated. By using atomic-switch based FPGA as CPU accelerator, both programmability and energy efficiency can be achieved. When a software process in the CPU is
offloaded to NPL, the nine times faster processing speed and three times higher
energy efficiency are realized.
Acknowledgments A part of this work was supported by NEDO. A part of the device processing
was operated by AIST, Japan.
Power consumpon (mW)
Frequency (MHz)
57.9uW/MHz
30.5uW/MHz
CPU/RAM/ROM
(inc. data transfer)
CPU/RAM/ROM/FPGA
2.0
1.5
1
0.5
0 5
10
15
20
25
30
Fig. 13 Active power
consumption of with FPGA
in open circle and without
FPGA in solid diamond
30
T. Sakamoto et al.