6.2 Hybrid TFET Reconfigurable CAM/SRAM Array Based on a 9T-TFET. . .
81
Table 6.3
TFET CAM/SRAM speed and power comparison [©2016 IEEE]
Cell
VDD (V)
WL
Pulse
read (ns)
WL
Pulse
write (ns)
E
READ
(fJ/bit)
E
WRITE
(fJ/bit)
I
LEAK active
(without Rd/Wr)
(pA/bit)
I
LEAK STBY
(fA/bit)
Area-bitcell
(µm 2
)
9T-TFET (128
× 128)
[CAM/SRAM]
1
0.87/0.19
0.92/0.92
0.14/2.38
16.5/16.5
25.5/3.19
5.00
0.375
9T-TFET (128
× 128)
[CAM/SRAM]-Assist
1
0.55/0.19
0.55/0.55
0.16/2.38
16.5/16.5
25.5/3.19
5.00
0.375
TCAM(128
× 32)
65 nm [77]
1
0.24
N.A.
1230 uW b
742 uW b
N.A.
>
1
× 10 6
MFCAM(1 Mb)
90 nm [78]
1.2
5
5
25.7mW b
3.95
× 10 6
/4.6
×
10 3
4.563
6T-CMOS 32 nm
0.75
0.27
0.16
9.10
12.9
11.8
7.8
× 10 3
0.120
6T-CMOS 65 nm [8]
1.2
7 ns (access time) a
N.A.
N.A.
N.A.
27.0 a
2.04
a
Measurement value for full memory
b
Reported power per access