68
5 TFET NDR Flip-Flop
0,01
0,10
1,00
0,3
0,4
0,5
0,6
TFET-FF
CMOS FF
FinFET FF
FinFET FF-HP
Supply Voltage [V]
Max. Frequency [GHz]
10 0
10 1
10 2
10 -1
10 -2
Fig. 5.13 12T-TFET FF comparison with LP-CMOS and FinFET FF’s: maximum operating
frequency vs. supply voltage [©2016 IEEE]
Table 5.1 Transistor count
for various flip-flop designs
[©2016 IEEE]
Flip-flop architecture
Transistor count
Proposed design
12 (14) a
Transmission gate
24
C 2 MOS (C 2 MOSFF)
24
Semi-dynamic (SDFF)
23
Sense amp (SAFF)
18 (19)
Modified sense amp (MSAFF) 26 (27)
Pseudo-static DFF (DFF)
14 (18)
a Device count will increase by two considering CLK
buffering inside FF
to 23× improvement is achieved for the proposed TFET design in comparison to
CMOS and FinFET-LSTP designs.
5.4 Comparison and Results
This section presents the comparison of the 12T-TFET MSFF with designs reported
in literature for MOSFET and TFET flip-flops where the performance reported
in [70] is used as a reference. Comparison is done for all designs under similar
constraints such as fan-out and operating voltage. The different MSFF architectures
considered in this comparison are summarized in Table 5.1 together with the
corresponding transistor count. The performance data presented in the following
subsections are extracted either from simulations or from literature for comparison
purpose [70].
5 TFET NDR Flip-Flop
0,01
0,10
1,00
0,3
0,4
0,5
0,6
TFET-FF
CMOS FF
FinFET FF
FinFET FF-HP
Supply Voltage [V]
Max. Frequency [GHz]
10 0
10 1
10 2
10 -1
10 -2
Fig. 5.13 12T-TFET FF comparison with LP-CMOS and FinFET FF’s: maximum operating
frequency vs. supply voltage [©2016 IEEE]
Table 5.1 Transistor count
for various flip-flop designs
[©2016 IEEE]
Flip-flop architecture
Transistor count
Proposed design
12 (14) a
Transmission gate
24
C 2 MOS (C 2 MOSFF)
24
Semi-dynamic (SDFF)
23
Sense amp (SAFF)
18 (19)
Modified sense amp (MSAFF) 26 (27)
Pseudo-static DFF (DFF)
14 (18)
a Device count will increase by two considering CLK
buffering inside FF
to 23× improvement is achieved for the proposed TFET design in comparison to
CMOS and FinFET-LSTP designs.
5.4 Comparison and Results
This section presents the comparison of the 12T-TFET MSFF with designs reported
in literature for MOSFET and TFET flip-flops where the performance reported
in [70] is used as a reference. Comparison is done for all designs under similar
constraints such as fan-out and operating voltage. The different MSFF architectures
considered in this comparison are summarized in Table 5.1 together with the
corresponding transistor count. The performance data presented in the following
subsections are extracted either from simulations or from literature for comparison
purpose [70].