List of Tables
Table 3.1 Comparison - power and area [©2016 IEEE] . . . . . . . . . . . . . . . . . . . . . . 41
Table 4.1 uDRAM, uSRAM, and uCAM comparison with
state-of-the-art CMOS RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 5.1 Transistor count for various flip-flop designs [©2016 IEEE] . . . . . . 68
Table 6.1 Signal voltages during CAM-/SRAM-mode write for
selected and HS cells (writing) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Table 6.2 Signal voltages during CAM- and SRAM-mode read
[©2016 IEEE] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Table 6.3 TFET CAM/SRAM speed and power comparison [©2016
IEEE] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Table 6.4 CMOS CAM/SRAM comparison with state-of-the-art
[©2017 IEEE] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table 6.5 Signal voltages during Search . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Table 6.6 Voltages during write for selected and HS cells (writing “1”) . . . . . 95
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