102
6 Content-Addressable Memories
Fig. 6.30 Read waveform
for hit and miss conditions
[©2016 IEEE]
DL
DLB
ML -search miss
ML -search hit
Start of search
Voltage [mV]→ Voltage [mV]→
Time [ns]→
650.0
650.0
550.0
500.0
400.0
300.0
200.0
0.6
1.0
1.4
1.8
2.2
2.6
450.0
350.0
250.0
150.0
50.0
–50.0
Fig. 6.31 Write waveform
for writing X (10), 0 (00), and
1 (11) [©2016 IEEE]
WWL
DL
DLB
Q0
Q1 Q1
Voltage [mV]→Voltage [mV]→ Voltage [mV]→
Time [ns]→
900.0
600.0
400.0
200.0
650.0
650.0
450.0
450.0
300.0
300.0
150.0
150.0
0.0
0.0
0.0
10.0
20.0
30.0
40.0
50.0
0.0
VDD
WWL[0]
GND
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
VDD
GND
ML[0]
ML[N]
WWL[N]
DL[0]
DLB[0]
DL[1]
DLB[1]
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
Fig. 6.32 Memory array organization [©2016 IEEE]
6 Content-Addressable Memories
Fig. 6.30 Read waveform
for hit and miss conditions
[©2016 IEEE]
DL
DLB
ML -search miss
ML -search hit
Start of search
Voltage [mV]→ Voltage [mV]→
Time [ns]→
650.0
650.0
550.0
500.0
400.0
300.0
200.0
0.6
1.0
1.4
1.8
2.2
2.6
450.0
350.0
250.0
150.0
50.0
–50.0
Fig. 6.31 Write waveform
for writing X (10), 0 (00), and
1 (11) [©2016 IEEE]
WWL
DL
DLB
Q0
Q1 Q1
Voltage [mV]→Voltage [mV]→ Voltage [mV]→
Time [ns]→
900.0
600.0
400.0
200.0
650.0
650.0
450.0
450.0
300.0
300.0
150.0
150.0
0.0
0.0
0.0
10.0
20.0
30.0
40.0
50.0
0.0
VDD
WWL[0]
GND
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
GND
M 0
M 1
Q0
M 2
Q1
VDD
GND
ML[0]
ML[N]
WWL[N]
DL[0]
DLB[0]
DL[1]
DLB[1]
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
M 6
M 3
M 5
M 4
Fig. 6.32 Memory array organization [©2016 IEEE]
