Chapter 17
Interconnect Quality and Reliability
of 3D Packaging
Yaodong Wang, Yingxia Liu, Menglu Li, K. N. Tu, and Luhua Xu
17.1 Introduction
The challenges to quality and reliability for 3D IC packaging technology include but
not limited to the followings. (1) New manufacturing processes that heavily involve
through silicon via (TSV), micro-bumping, die stacking, multiple high temperature
reflows; (2) New materials including new under bump metallurgies (UBM) with
new Pb-free solder materials, new underfill materials that flow into thin gap for
microbumps; (3) Miniaturization in size, where solder joint is 5–10× smaller than
C4 solder joints, which translates to a volume shrinkage by 3 orders of magnitude;
(4) Thermal mechanical environment changes: Joule heating has to find new ways to
dissipate, thermal gradient and thermal stress concentration are built up across layers;
(5) Any new electromigration and thermomigration concerns should be studied,
including failure in redistribution layers; (6) Reliability requirement changes due
to new failure modes transition from desktop, laptop to mobile devices [1].
In this chapter, we discuss quality and reliability of interconnects in 2.5D IC and
3D IC packaging technology—microbump, TSV, UBM and copper interconnects,
and we compare them to the quality and reliability concerns observed in the existing
interconnects. We shall cover microstructure changes and failures driven by mechanical stressing, electromigration (EM), and thermomigration (TM). This way we can
see how the transition, for example, from C-4 joints to microbumps, may affect the
failure modes. On mechanical stressing, we emphasize the brittle nature as well as
micro-void formation, especially Kirkendall void formation in microbumps. A string
Y. Wang · Y. Liu · M. Li · K. N. Tu
Department of Materials Science and Engineering, UCLA, Los Angeles, CA, USA
L. Xu (B)
Intel Corporation, Chandler, AZ, USA
e-mail: luhua_xu@apple.com
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_17
527
Interconnect Quality and Reliability
of 3D Packaging
Yaodong Wang, Yingxia Liu, Menglu Li, K. N. Tu, and Luhua Xu
17.1 Introduction
The challenges to quality and reliability for 3D IC packaging technology include but
not limited to the followings. (1) New manufacturing processes that heavily involve
through silicon via (TSV), micro-bumping, die stacking, multiple high temperature
reflows; (2) New materials including new under bump metallurgies (UBM) with
new Pb-free solder materials, new underfill materials that flow into thin gap for
microbumps; (3) Miniaturization in size, where solder joint is 5–10× smaller than
C4 solder joints, which translates to a volume shrinkage by 3 orders of magnitude;
(4) Thermal mechanical environment changes: Joule heating has to find new ways to
dissipate, thermal gradient and thermal stress concentration are built up across layers;
(5) Any new electromigration and thermomigration concerns should be studied,
including failure in redistribution layers; (6) Reliability requirement changes due
to new failure modes transition from desktop, laptop to mobile devices [1].
In this chapter, we discuss quality and reliability of interconnects in 2.5D IC and
3D IC packaging technology—microbump, TSV, UBM and copper interconnects,
and we compare them to the quality and reliability concerns observed in the existing
interconnects. We shall cover microstructure changes and failures driven by mechanical stressing, electromigration (EM), and thermomigration (TM). This way we can
see how the transition, for example, from C-4 joints to microbumps, may affect the
failure modes. On mechanical stressing, we emphasize the brittle nature as well as
micro-void formation, especially Kirkendall void formation in microbumps. A string
Y. Wang · Y. Liu · M. Li · K. N. Tu
Department of Materials Science and Engineering, UCLA, Los Angeles, CA, USA
L. Xu (B)
Intel Corporation, Chandler, AZ, USA
e-mail: luhua_xu@apple.com
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_17
527