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P. Vianco and M. Neilsen
(PCBs). The benefit to both consumer and high reliability electronics (military, satellite, and space) communities has been, not only smaller, lighter products, but also a
significant increase in their functionality.
This trend has proven to be particularly advantageous for the larger active devices
such as microprocessor. These components traditionally have the largest area footprint on the PCB. Over the past forty years, as the silicon (Si) die have reduced in size,
the accompanying package has followed suit. The size reduction has been accompanied by a change of the package input/output (I/O) configuration in order to support
the decrease of package size as well as maintain yields in assembly processes. The
pin-in-hole geometry of early generation, dual in-line packages (DIPs) gave way to
J-lead and gull-wing lead configurations. As package functionality increased, more
I/O were required for power, ground, and signal transmission. Lead sizes had to
decrease along with the reduced package dimensions. As pitches reduced to 0.4 mm
and less (so-called “fine pitch” in the 1990s), the thin, flimsy leads became susceptible
to handling damage, which negatively impacted manufacturing yields. See Printed
Circuits Handbook-Seventh Edition (eds., C. Coombs and H. Holden, McGraw-Hill,
New York, NY) for a detailed discussion.
Therefore, the peripheral-leaded package geometry was replaced with area-array
technology whereby I/O are placed on the bottom surface of the package. The first
area-array I/O configuration was that of the pin-grid array that required pin-in-hole
solder joints or sockets. The ball-grid array (BGA) package eliminated the need for
through-hole interconnections, which improved PCB producibility because the interconnections were entirely surface mount. The BGA has solder ball interconnections
placed on the bottom of the injected molded, plastic package. The counterpart to this
plastic ball-grid array (PBGA) package was the ceramic column-grid array (CCGA)
package that meets the need to package the die in a hermetic environment.
The consumer products industry and, in particular, the explosive growth in handheld devices ranging from the cell phone and to the iPhone™ (iPhone is a trademark
of Apple Corporation, Cupertino, CA), has led the way to further miniaturization
and increased functionality of electronic assemblies. Designers decreased the PCB
footprint to meet area (“x-y”) size limitations. The remaining option to increase
functionality was to add capability in the vertical (or “z”) dimension, which has led
to the development of three-dimensional (3-D) packaging.
It is important to realize that miniaturization was not the only driver for designers to
consider 3-D packaging. At the same, product performance was requiring packages,
and even the dice in the packages, be in closer proximity to one-another so as to reduce
the travel time of signals between them. Moreover, shorter conductor lengths reduced
parasitics in the circuit, which reduced power consumption as well as improved
functional performance.
P. Vianco and M. Neilsen
(PCBs). The benefit to both consumer and high reliability electronics (military, satellite, and space) communities has been, not only smaller, lighter products, but also a
significant increase in their functionality.
This trend has proven to be particularly advantageous for the larger active devices
such as microprocessor. These components traditionally have the largest area footprint on the PCB. Over the past forty years, as the silicon (Si) die have reduced in size,
the accompanying package has followed suit. The size reduction has been accompanied by a change of the package input/output (I/O) configuration in order to support
the decrease of package size as well as maintain yields in assembly processes. The
pin-in-hole geometry of early generation, dual in-line packages (DIPs) gave way to
J-lead and gull-wing lead configurations. As package functionality increased, more
I/O were required for power, ground, and signal transmission. Lead sizes had to
decrease along with the reduced package dimensions. As pitches reduced to 0.4 mm
and less (so-called “fine pitch” in the 1990s), the thin, flimsy leads became susceptible
to handling damage, which negatively impacted manufacturing yields. See Printed
Circuits Handbook-Seventh Edition (eds., C. Coombs and H. Holden, McGraw-Hill,
New York, NY) for a detailed discussion.
Therefore, the peripheral-leaded package geometry was replaced with area-array
technology whereby I/O are placed on the bottom surface of the package. The first
area-array I/O configuration was that of the pin-grid array that required pin-in-hole
solder joints or sockets. The ball-grid array (BGA) package eliminated the need for
through-hole interconnections, which improved PCB producibility because the interconnections were entirely surface mount. The BGA has solder ball interconnections
placed on the bottom of the injected molded, plastic package. The counterpart to this
plastic ball-grid array (PBGA) package was the ceramic column-grid array (CCGA)
package that meets the need to package the die in a hermetic environment.
The consumer products industry and, in particular, the explosive growth in handheld devices ranging from the cell phone and to the iPhone™ (iPhone is a trademark
of Apple Corporation, Cupertino, CA), has led the way to further miniaturization
and increased functionality of electronic assemblies. Designers decreased the PCB
footprint to meet area (“x-y”) size limitations. The remaining option to increase
functionality was to add capability in the vertical (or “z”) dimension, which has led
to the development of three-dimensional (3-D) packaging.
It is important to realize that miniaturization was not the only driver for designers to
consider 3-D packaging. At the same, product performance was requiring packages,
and even the dice in the packages, be in closer proximity to one-another so as to reduce
the travel time of signals between them. Moreover, shorter conductor lengths reduced
parasitics in the circuit, which reduced power consumption as well as improved
functional performance.