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S. Shi et al.
material depending on the type of application (e.g. RoHS, high speed, high reliability,
high power/voltage) [10]. The reader is recommended to consult the appropriate
resources for guidance on raw material selection, as the number of new materials
and applications is changing rapidly.
Quality testing is normally required of these materials as part of the
incoming/receiving procedure of many printed circuit board fabricators. Typically
Cu is stripped and the dielectric is examined for embedded particles, which could
compromise the electrical performance of the material. Additionally, dielectric breakdown strength testing is typically conducted on a sample of core material from the
production lot to understand if there exist raw material defects. In order to have an
acceptable bonding strength, the Cu foil will typically have a “tooth” that facilitates
the bonding with the base dielectric material. However, this can result in electrically
sensitive field intensification that can result in compromising the dielectric strength
of the core material. Recently, higher I/O density drives the lower profile copper foil.
The copper thickness of the cores and prepregs is typically designated in terminology such as ½ oz, 1 oz foil. This is the mass of the foil per 1 ft
2 area. Conventionally,
½ oz. Cu foil is equivalent to a thickness of 18 μm and 1 oz Cu foil equal to 36 μm
thickness. Typically, the thinner the starting Cu thickness, the finer the lines and
spaces features possible on the finished multi-layer organic substrate design. The
raw materials are typically sized into 16
× 20
, 24
× 36
or 400 mm × 500 mm
sized panels for processing through the manufacturing process. While smaller development runs of 5 panels are possible, a typically manufacturing lot consists of 20–30
panels processed through the full manufacturing flow.
14.4.2 Inner Layer Imaging
After the raw materials have been selected the cores are pre-cleaned and moved into
a clean room to image the pattern on the core material. Figure 14.8a–e presents a
representation of the inner layer core imaging sequence. A photo sensitive resist is
laminated on the core material. An artwork film which is an image of the line pattern
acts as a mask. The inner layer image is exposed by ultraviolet light, crosslinking
the exposed resist material. The unexposed resist is rinsed away via a conveyorized
horizontal developer. The partially exposed Cu signal layer is etched away. The Cu
signal areas covered with the remaining resist are protected from the etchant and
remain unetched. The desired signal pattern is generated and finally, the remaining
resist is stripped. After the inner layer core fabrication, optical and laser automated
optical inspection (AOI) systems scan the etched circuit pattern and compare it with
the base artwork. Depending on the customer requirements, certain features may be
repaired or reworked at this step. After the completion of the inspection procedure,
the remaining Cu is prepared chemically for the multilayer buildup process in the
proceeding manufacturing sequence.
S. Shi et al.
material depending on the type of application (e.g. RoHS, high speed, high reliability,
high power/voltage) [10]. The reader is recommended to consult the appropriate
resources for guidance on raw material selection, as the number of new materials
and applications is changing rapidly.
Quality testing is normally required of these materials as part of the
incoming/receiving procedure of many printed circuit board fabricators. Typically
Cu is stripped and the dielectric is examined for embedded particles, which could
compromise the electrical performance of the material. Additionally, dielectric breakdown strength testing is typically conducted on a sample of core material from the
production lot to understand if there exist raw material defects. In order to have an
acceptable bonding strength, the Cu foil will typically have a “tooth” that facilitates
the bonding with the base dielectric material. However, this can result in electrically
sensitive field intensification that can result in compromising the dielectric strength
of the core material. Recently, higher I/O density drives the lower profile copper foil.
The copper thickness of the cores and prepregs is typically designated in terminology such as ½ oz, 1 oz foil. This is the mass of the foil per 1 ft
2 area. Conventionally,
½ oz. Cu foil is equivalent to a thickness of 18 μm and 1 oz Cu foil equal to 36 μm
thickness. Typically, the thinner the starting Cu thickness, the finer the lines and
spaces features possible on the finished multi-layer organic substrate design. The
raw materials are typically sized into 16
× 20
, 24
× 36
or 400 mm × 500 mm
sized panels for processing through the manufacturing process. While smaller development runs of 5 panels are possible, a typically manufacturing lot consists of 20–30
panels processed through the full manufacturing flow.
14.4.2 Inner Layer Imaging
After the raw materials have been selected the cores are pre-cleaned and moved into
a clean room to image the pattern on the core material. Figure 14.8a–e presents a
representation of the inner layer core imaging sequence. A photo sensitive resist is
laminated on the core material. An artwork film which is an image of the line pattern
acts as a mask. The inner layer image is exposed by ultraviolet light, crosslinking
the exposed resist material. The unexposed resist is rinsed away via a conveyorized
horizontal developer. The partially exposed Cu signal layer is etched away. The Cu
signal areas covered with the remaining resist are protected from the etchant and
remain unetched. The desired signal pattern is generated and finally, the remaining
resist is stripped. After the inner layer core fabrication, optical and laser automated
optical inspection (AOI) systems scan the etched circuit pattern and compare it with
the base artwork. Depending on the customer requirements, certain features may be
repaired or reworked at this step. After the completion of the inspection procedure,
the remaining Cu is prepared chemically for the multilayer buildup process in the
proceeding manufacturing sequence.