2 3D Packaging Architectures and Assembly Process Design
23
Fig. 2.4 Cross-section of HBM2 stack. Acknowledgment system plus consulting
in a general overview, this chapter will attempt to provide a broad perspective of
the architectural and process opportunities and complexities. The process of TSV
formation has been previously discussed in depth in Chap. 3 and will not be repeated
here, except for a brief reference in Sect. 2.3.
The most commonly used interconnect between stacked die for currently available
(ca. 2019–2020) products with TSV’s is solder based (Fig. 2.4) with interconnect
pitches as low as 40 µm. Solder based interconnects have an advantage of being
compliant and hence they are more tolerant to slight misalignment and/or a lack of
co-planarity between bonded surfaces during assembly.
4 However with decreasing
interconnect pitches for future 3D stacks, as the joints become increasingly small,
the available solder volume will be reduced and a greater proportion of the solder
joints will become intermetallic compounds, thus decreasing their compliance [24].
Additionally, with shrinking interconnect pitch, there is an increasing risk of solder
bridging between adjacent interconnects during the assembly process since the joints
are closer to each other. Dispensing and flowing a protective epoxy underfill also
becomes an increasing challenge with reduced chip gaps. Various research groups
have suggested the need for alternate chip-to-chip interconnects for reduced dimensions, the most common among these are Cu–Cu bonding [25–30], a subject covered
in detail in Chap. 8.
4 In most applications Thermo-compression Bonding (TCB), is used to create the fine pitch interconnect typically needed between two stacked die, because of its superior alignment capability over
reflow based flip-chip bonding [23].
23
Fig. 2.4 Cross-section of HBM2 stack. Acknowledgment system plus consulting
in a general overview, this chapter will attempt to provide a broad perspective of
the architectural and process opportunities and complexities. The process of TSV
formation has been previously discussed in depth in Chap. 3 and will not be repeated
here, except for a brief reference in Sect. 2.3.
The most commonly used interconnect between stacked die for currently available
(ca. 2019–2020) products with TSV’s is solder based (Fig. 2.4) with interconnect
pitches as low as 40 µm. Solder based interconnects have an advantage of being
compliant and hence they are more tolerant to slight misalignment and/or a lack of
co-planarity between bonded surfaces during assembly.
4 However with decreasing
interconnect pitches for future 3D stacks, as the joints become increasingly small,
the available solder volume will be reduced and a greater proportion of the solder
joints will become intermetallic compounds, thus decreasing their compliance [24].
Additionally, with shrinking interconnect pitch, there is an increasing risk of solder
bridging between adjacent interconnects during the assembly process since the joints
are closer to each other. Dispensing and flowing a protective epoxy underfill also
becomes an increasing challenge with reduced chip gaps. Various research groups
have suggested the need for alternate chip-to-chip interconnects for reduced dimensions, the most common among these are Cu–Cu bonding [25–30], a subject covered
in detail in Chap. 8.
4 In most applications Thermo-compression Bonding (TCB), is used to create the fine pitch interconnect typically needed between two stacked die, because of its superior alignment capability over
reflow based flip-chip bonding [23].