13 Fundamentals of Heat Dissipation in 3D IC Packaging …
393
7. E.G. Colgan, B. Furman, M. Gaynes, N. LaBianca, J.H. Magerlein, R. Polastre, R. Bezama, K.
Marston, R. Schmidt, High performance and subambient silicon microchannel cooling. ASME
J. Heat Transfer 129(8), 1046–1051 (2007)
8. M.E. Steinke, S.G. Kandlikar, Single-phase liquid heat transfer in plain and enhanced
microchannels, in ASME 4th International Conference on Nanochannels, Microchannels and
Minichannels (Limerick, Ireland, June 19–21), ASME Paper No. ICNMM2006-96227
9. S.G. Kandlikar, D. Kudithipudi, C.A. Rubio-Jimenez, Cooling mechanisms in 3D ICs: thermomechanical perspective, in IEEE International Green Computing Conference and Workshops
(IGCC) (Orlando, FL, 2011), July, pp. 25–28
10. W.M. Kays, London, Compact Heat Exchangers. McGraw Hills, New York, NY (1984)
11. W.-L. Cheng, W.-W. Zhang, H. Chen, L. Hu, Spray cooling and flash evaporation cooling: The
current development and application. Renew. Sustain. Energy Rev. 55, 614–628 (2016)
12. S.G. Kandlikar, W.J. Grande, Evolution of microchannel flow passages-thermohydraulic
performance and fabrication technology 24(1), 3–17 (2003)
13. J.-M. Koo, S. Im, L. Jiang, K.E. Goodson, Integrated microchannel cooling for threedimensional electronic circuit architecture. ASME J. Heat Transfer 127(1), 49–58 (2005)
14. A.W. Topol, D.C. La Tulipe, L. Shi, D.J. Frank, Three-dimensional integrated circuit. IBM J.
Res. Develop. 50(4.5), 491–506 (2006). https://doi.org/10.1147/rd.504.0491
15. H. Mizunuma, L.Y. Chang, Y. Chia-Lin, Thermal modeling and analysis for 3-D ICs with
integrated microchannel cooling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(9),
1293–1306 (2011). https://doi.org/10.1109/TCAD.2011.2144596
16. J.H. Lau, T.G. Yue, Thermal management of 3D IC integration with TSV (through silicon via),
in 59th Electronic Components and Technology Conference, pp. 635–640 (2009)
17. K. Puttaswamy, G.H. Loh, Thermal analysis of a 3D die-stacked high-performance microprocessor, in Proceedings of the 16th ACM Great Lakes symposium on VLSI, pp. 19–24
(2006)
18. H. Wei, M.R. Stan, S. Gurumurthi, R.J.K. Skadron, Interaction of scaling trends in processor
architecture and cooling, in 26th Annual IEEE SEMI-THERM, pp. 198–204 (2010)
19. P. Chaparro, J. González, G. Magklis, C. Qiong, A. González, Understanding the thermal
implications of multi-core architectures. IEEE Trans. Parallel Distrib. Syst. 18(8), 1055–1065
(2007)
20. I. Yeo, C.C. Liu, E.J. Kim, Predictive dynamic thermal management for multicore systems.
Proc. of DAC 2008, 734–739 (2008)
21. H.F. Sheikh, H. Tan, I. Ahmad, S. Ranka, B. Phanisekhar, Energy-and performance-aware
scheduling of tasks on parallel and distributed systems. ACM J. Emerg. Technol. Comput.
Syst. (JETC) 8(4), 32 (2012)
22. D. Cuesta, J. Ayala, J. Hidalgo, D. Atienza, A. Acquaviva, E. Macii, Adaptive Task Migration Policies for Thermal Control in MPSOCS, VLSI 2010 Annual Symposium (Springer,
Netherlands, 2011), pp. 83–115
23. T. Ge, P. Malani, Q. Qiu, Distributed task migration for thermal management in many-core
systems. Proc. of DAC 2010, 579–584 (2010)
24. J. Cui, D. Maskell, A fast high-level event-driven thermal estimator for dynamic thermal aware
scheduling. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 31(6), 904–917 (2012)
25. K. Chen, E. Chang, H. Li, A. Wu, RC-based temperature prediction scheme for proactive
dynamic thermal management in throttle-based 3D NoCs. IEEE Trans. Parallel Distrib. Syst.
26(1), 206–218 (January 1, 2015)
26. H. Xiao, W. Yueh, S. Mukhopadhyay, S. Yalamanchili, Thermally adaptive cache access
mechanisms for 3D many-core architectures. IEEE Comput. Archite. Lett. 15(2), 129–132
(July–December 1, 2016)
27. D. Yinon, T.D. Dudderar, B.J. Han, A.M. Lyons, Thin Packaging of Multi-Chip Modules with
Enhanced Thermal/Power Management. U.S. Patent No. 5,646,828. 8 (July, 1997)
28. M. Qing, H. Fujimoto, Silicon Interposer and Multi-Chip-Module (MCM) with Through
Substrate Vias. U.S. Patent No. 6,229,216 (2001)
393
7. E.G. Colgan, B. Furman, M. Gaynes, N. LaBianca, J.H. Magerlein, R. Polastre, R. Bezama, K.
Marston, R. Schmidt, High performance and subambient silicon microchannel cooling. ASME
J. Heat Transfer 129(8), 1046–1051 (2007)
8. M.E. Steinke, S.G. Kandlikar, Single-phase liquid heat transfer in plain and enhanced
microchannels, in ASME 4th International Conference on Nanochannels, Microchannels and
Minichannels (Limerick, Ireland, June 19–21), ASME Paper No. ICNMM2006-96227
9. S.G. Kandlikar, D. Kudithipudi, C.A. Rubio-Jimenez, Cooling mechanisms in 3D ICs: thermomechanical perspective, in IEEE International Green Computing Conference and Workshops
(IGCC) (Orlando, FL, 2011), July, pp. 25–28
10. W.M. Kays, London, Compact Heat Exchangers. McGraw Hills, New York, NY (1984)
11. W.-L. Cheng, W.-W. Zhang, H. Chen, L. Hu, Spray cooling and flash evaporation cooling: The
current development and application. Renew. Sustain. Energy Rev. 55, 614–628 (2016)
12. S.G. Kandlikar, W.J. Grande, Evolution of microchannel flow passages-thermohydraulic
performance and fabrication technology 24(1), 3–17 (2003)
13. J.-M. Koo, S. Im, L. Jiang, K.E. Goodson, Integrated microchannel cooling for threedimensional electronic circuit architecture. ASME J. Heat Transfer 127(1), 49–58 (2005)
14. A.W. Topol, D.C. La Tulipe, L. Shi, D.J. Frank, Three-dimensional integrated circuit. IBM J.
Res. Develop. 50(4.5), 491–506 (2006). https://doi.org/10.1147/rd.504.0491
15. H. Mizunuma, L.Y. Chang, Y. Chia-Lin, Thermal modeling and analysis for 3-D ICs with
integrated microchannel cooling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(9),
1293–1306 (2011). https://doi.org/10.1109/TCAD.2011.2144596
16. J.H. Lau, T.G. Yue, Thermal management of 3D IC integration with TSV (through silicon via),
in 59th Electronic Components and Technology Conference, pp. 635–640 (2009)
17. K. Puttaswamy, G.H. Loh, Thermal analysis of a 3D die-stacked high-performance microprocessor, in Proceedings of the 16th ACM Great Lakes symposium on VLSI, pp. 19–24
(2006)
18. H. Wei, M.R. Stan, S. Gurumurthi, R.J.K. Skadron, Interaction of scaling trends in processor
architecture and cooling, in 26th Annual IEEE SEMI-THERM, pp. 198–204 (2010)
19. P. Chaparro, J. González, G. Magklis, C. Qiong, A. González, Understanding the thermal
implications of multi-core architectures. IEEE Trans. Parallel Distrib. Syst. 18(8), 1055–1065
(2007)
20. I. Yeo, C.C. Liu, E.J. Kim, Predictive dynamic thermal management for multicore systems.
Proc. of DAC 2008, 734–739 (2008)
21. H.F. Sheikh, H. Tan, I. Ahmad, S. Ranka, B. Phanisekhar, Energy-and performance-aware
scheduling of tasks on parallel and distributed systems. ACM J. Emerg. Technol. Comput.
Syst. (JETC) 8(4), 32 (2012)
22. D. Cuesta, J. Ayala, J. Hidalgo, D. Atienza, A. Acquaviva, E. Macii, Adaptive Task Migration Policies for Thermal Control in MPSOCS, VLSI 2010 Annual Symposium (Springer,
Netherlands, 2011), pp. 83–115
23. T. Ge, P. Malani, Q. Qiu, Distributed task migration for thermal management in many-core
systems. Proc. of DAC 2010, 579–584 (2010)
24. J. Cui, D. Maskell, A fast high-level event-driven thermal estimator for dynamic thermal aware
scheduling. IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst. 31(6), 904–917 (2012)
25. K. Chen, E. Chang, H. Li, A. Wu, RC-based temperature prediction scheme for proactive
dynamic thermal management in throttle-based 3D NoCs. IEEE Trans. Parallel Distrib. Syst.
26(1), 206–218 (January 1, 2015)
26. H. Xiao, W. Yueh, S. Mukhopadhyay, S. Yalamanchili, Thermally adaptive cache access
mechanisms for 3D many-core architectures. IEEE Comput. Archite. Lett. 15(2), 129–132
(July–December 1, 2016)
27. D. Yinon, T.D. Dudderar, B.J. Han, A.M. Lyons, Thin Packaging of Multi-Chip Modules with
Enhanced Thermal/Power Management. U.S. Patent No. 5,646,828. 8 (July, 1997)
28. M. Qing, H. Fujimoto, Silicon Interposer and Multi-Chip-Module (MCM) with Through
Substrate Vias. U.S. Patent No. 6,229,216 (2001)