13 Fundamentals of Heat Dissipation in 3D IC Packaging …
391
thermal integration for TSV placement, interlayer and coolant selection to improve
both electrical and thermohydraulic performance is warranted.
Heat pipe technology represents the application of two-phase cooling using
enclosed heat pipes that provide a high thermal conductivity path for removing heat
from hot spots. Recently, this technique has been effectively applied to smartphones
and mobile devices. Chiou et al. [56] developed a routing algorithm for the placement
of bended heat pipes in 3D IC stack. They claim the algorithm to provide a more efficient design tool as compared to conventional commercial software packages such
as ANSYS Fluent. Yue et al. [6] employed a vapor chamber with capillary transport of liquid from condenser to evaporator region in miniaturized devices. These
works clearly demonstrate the potential of applying the advanced two-phase cooling
technologies to mobile and miniaturized devices.
13.8 Future Directions
Monolithic 3D IC technology has been envisioned to solve the global interconnect problem by integrating multiple active layers within a short vertical distance.
This processing and memory blocks are within a few tens of microns along the
vertical dimension resulting in ultra-low latency interconnects. Vertical processormemory stacks interconnected by dense bundles of TSVs provide super high bandwidth memory interconnects creating new frontiers of computer design removing the
classical constraints on memory bandwidth. However, in spite of these advantages
one of the primary challenges of 3D IC technology is an increased power density
as noted earlier. Multiple blocks on the same vertical axes contribute to the power
dissipation at a particular location. This fact makes effective heat extraction from
layers away from the heat sink very difficult, a fact that is exacerbated by the low
thermal conductivity of silicon. Only the layer closest to the conduction cooler such
as the heat sink and fan ensemble can lose the heat quickly. These factors result in
trapping the generated heat within the layers of the 3D ICs intensifying the problem
as the number of layers increases. This trapped heat results in sharp increases in
temperature and affects the performance, reliability and durability of the ICs. Consequently, due to the thermal concerns in 3D ICs being more severe than traditional
planar chips, the number of layers possible to integrate are practically limited. Additionally, architectural limitations are imposed so that the most practical 3D ICs are
limited to only a single layer of processors and multiple layers of memory stacks.
To alleviate the heat dissipation problem particularly from the internal layers of
the 3D ICs, researchers have proposed using interlayer cooling infrastructures built
using microfluidic channels. Microchannels through the silicon substrates can circulate coolant fluids to effectively extract heat from the layers of the 3D ICs that are
separated from the conventional heat sink. However, there is an inherent conflict
in the considerations about 3D IC performance and the ability of the microfluidic
interlayer coolers to extract heat. For optimal hydraulic and thermal performance the
height of the microchannels needs to be of the order of hundred microns. This results
391
thermal integration for TSV placement, interlayer and coolant selection to improve
both electrical and thermohydraulic performance is warranted.
Heat pipe technology represents the application of two-phase cooling using
enclosed heat pipes that provide a high thermal conductivity path for removing heat
from hot spots. Recently, this technique has been effectively applied to smartphones
and mobile devices. Chiou et al. [56] developed a routing algorithm for the placement
of bended heat pipes in 3D IC stack. They claim the algorithm to provide a more efficient design tool as compared to conventional commercial software packages such
as ANSYS Fluent. Yue et al. [6] employed a vapor chamber with capillary transport of liquid from condenser to evaporator region in miniaturized devices. These
works clearly demonstrate the potential of applying the advanced two-phase cooling
technologies to mobile and miniaturized devices.
13.8 Future Directions
Monolithic 3D IC technology has been envisioned to solve the global interconnect problem by integrating multiple active layers within a short vertical distance.
This processing and memory blocks are within a few tens of microns along the
vertical dimension resulting in ultra-low latency interconnects. Vertical processormemory stacks interconnected by dense bundles of TSVs provide super high bandwidth memory interconnects creating new frontiers of computer design removing the
classical constraints on memory bandwidth. However, in spite of these advantages
one of the primary challenges of 3D IC technology is an increased power density
as noted earlier. Multiple blocks on the same vertical axes contribute to the power
dissipation at a particular location. This fact makes effective heat extraction from
layers away from the heat sink very difficult, a fact that is exacerbated by the low
thermal conductivity of silicon. Only the layer closest to the conduction cooler such
as the heat sink and fan ensemble can lose the heat quickly. These factors result in
trapping the generated heat within the layers of the 3D ICs intensifying the problem
as the number of layers increases. This trapped heat results in sharp increases in
temperature and affects the performance, reliability and durability of the ICs. Consequently, due to the thermal concerns in 3D ICs being more severe than traditional
planar chips, the number of layers possible to integrate are practically limited. Additionally, architectural limitations are imposed so that the most practical 3D ICs are
limited to only a single layer of processors and multiple layers of memory stacks.
To alleviate the heat dissipation problem particularly from the internal layers of
the 3D ICs, researchers have proposed using interlayer cooling infrastructures built
using microfluidic channels. Microchannels through the silicon substrates can circulate coolant fluids to effectively extract heat from the layers of the 3D ICs that are
separated from the conventional heat sink. However, there is an inherent conflict
in the considerations about 3D IC performance and the ability of the microfluidic
interlayer coolers to extract heat. For optimal hydraulic and thermal performance the
height of the microchannels needs to be of the order of hundred microns. This results