13 Fundamentals of Heat Dissipation in 3D IC Packaging …
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addressed in literature using microchannels between two adjacent 3D IC layers.
Single-phase cooling utilizes water or a dielectric fluid that transports heat without
undergoing phase change.
13.6.2 Thermal Analysis Tools for 3D ICs
For thermal analysis of 3D ICs one can adopt either simulation based environments or
real experimental beds. A few thermal estimation simulators based on finite element
method exist today. The commonly used ones are HotSpot 3D [35] and 3D-ICE [36].
These simulators require power dissipation profiles of the IC layers and then perform
meshing using heat flow equations to model the propagation of heat through the ICs.
13.6.3 Performance Considerations
3D integration has been explored to alleviate the limitations of 2D chips for SoC
and multicore architectures. In [14], the authors discuss the advantages and challenges of designing and manufacturing 3D ICs. It is shown that 3D ICs can improve
power, noise, logical span, density and performance. It even enables integration
of heterogeneous technologies in a single die. Processor-memory stacks with very
wide TSV based vertical busses where memory caches are directly stacked vertically
above respective processor cores are shown in [37]. Short vertical distances coupled
with ultra-wide TSV-based busses improve the memory access latency several times
ushering in new paradigms in computer design. In [38], a coupling of 3D IC technology and multicore architectures is proposed. However, because of the thermal
issues encountered in 3D ICs the number of vertical layers possible to realistically
stack have remained low to only about 2–4 layers. Moreover, architectural innovations are also limited to only vertical processor-memory stacks to reduce power
dissipation at the same location which would otherwise result in thermal hotspots.
Conventional DTM techniques have overheads, whereas thermal vias require
complex place and route optimizations and CAD tool support. Microfluidic interlayer coolers provide a solution to the thermal issues in 3D ICs without impacting
the performance of the IC as they do not require interference with the functionality
of the IC or the design of the active layers.
377
addressed in literature using microchannels between two adjacent 3D IC layers.
Single-phase cooling utilizes water or a dielectric fluid that transports heat without
undergoing phase change.
13.6.2 Thermal Analysis Tools for 3D ICs
For thermal analysis of 3D ICs one can adopt either simulation based environments or
real experimental beds. A few thermal estimation simulators based on finite element
method exist today. The commonly used ones are HotSpot 3D [35] and 3D-ICE [36].
These simulators require power dissipation profiles of the IC layers and then perform
meshing using heat flow equations to model the propagation of heat through the ICs.
13.6.3 Performance Considerations
3D integration has been explored to alleviate the limitations of 2D chips for SoC
and multicore architectures. In [14], the authors discuss the advantages and challenges of designing and manufacturing 3D ICs. It is shown that 3D ICs can improve
power, noise, logical span, density and performance. It even enables integration
of heterogeneous technologies in a single die. Processor-memory stacks with very
wide TSV based vertical busses where memory caches are directly stacked vertically
above respective processor cores are shown in [37]. Short vertical distances coupled
with ultra-wide TSV-based busses improve the memory access latency several times
ushering in new paradigms in computer design. In [38], a coupling of 3D IC technology and multicore architectures is proposed. However, because of the thermal
issues encountered in 3D ICs the number of vertical layers possible to realistically
stack have remained low to only about 2–4 layers. Moreover, architectural innovations are also limited to only vertical processor-memory stacks to reduce power
dissipation at the same location which would otherwise result in thermal hotspots.
Conventional DTM techniques have overheads, whereas thermal vias require
complex place and route optimizations and CAD tool support. Microfluidic interlayer coolers provide a solution to the thermal issues in 3D ICs without impacting
the performance of the IC as they do not require interference with the functionality
of the IC or the design of the active layers.