Chapter 11
Fundamentals of Solder Alloys in 3D
Packaging
Kwang-Lung Lin
11.1 The Microbumping Process
The microbump material reactions may occur during assembly process and performance. The assembly process is typically the reflow operation which involves liquid
solder/solid metallization interaction. A microbump experiences couple times of
reflow throughout the production of the bump itself and the afterwards joining
process. The performance, i.e., the product functioning, of the microbumps may
encounter thermal cycling and longtime thermal aging. Besides, the microbumps
certainly experience electrical current stressing during product application. There is
a chapter dealing with electromigration. Thus the discussion in this chapter will not
involve the materials reaction under electric current stressing. Readers are referred
to Chap. 7 for electromigration related subjects.
Flip chip bonding technology is one of the major interconnect technologies of
chip level packaging. The other two are wire bonding and Tape Automated Bonding
(TAB). Being an area array bonding design, the flip chip technology deserves the
highest I/O (input/output) numbers possible among the three designs gives rise to
larger pitch size than the peripheral bonding design of the wire bond and TAB.
These three chip level packaging technologies are adopting different bonding materials. Au wire, coated Cu wire, and silver alloy wire of the dimension of around
20 µm in diameter are the joining materials being used for the wire bonding process.
The discussion on the adoption of different materials is beyond the scope of this
chapter. Au bump produced on the electrode terminal (I/O) of the chip is being used
for the TAB bonding process. Both wire bonding and TAB bonding are fabricated
through thermal compressing. However, the flip chip bonding is fabricated via reflow
K.-L. Lin (B)
Department of Materials Science and Engineering, National Cheng Kung University, Tainan,
Taiwan, ROC
e-mail: matkllin@mail.ncku.edu.tw
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_11
329
Fundamentals of Solder Alloys in 3D
Packaging
Kwang-Lung Lin
11.1 The Microbumping Process
The microbump material reactions may occur during assembly process and performance. The assembly process is typically the reflow operation which involves liquid
solder/solid metallization interaction. A microbump experiences couple times of
reflow throughout the production of the bump itself and the afterwards joining
process. The performance, i.e., the product functioning, of the microbumps may
encounter thermal cycling and longtime thermal aging. Besides, the microbumps
certainly experience electrical current stressing during product application. There is
a chapter dealing with electromigration. Thus the discussion in this chapter will not
involve the materials reaction under electric current stressing. Readers are referred
to Chap. 7 for electromigration related subjects.
Flip chip bonding technology is one of the major interconnect technologies of
chip level packaging. The other two are wire bonding and Tape Automated Bonding
(TAB). Being an area array bonding design, the flip chip technology deserves the
highest I/O (input/output) numbers possible among the three designs gives rise to
larger pitch size than the peripheral bonding design of the wire bond and TAB.
These three chip level packaging technologies are adopting different bonding materials. Au wire, coated Cu wire, and silver alloy wire of the dimension of around
20 µm in diameter are the joining materials being used for the wire bonding process.
The discussion on the adoption of different materials is beyond the scope of this
chapter. Au bump produced on the electrode terminal (I/O) of the chip is being used
for the TAB bonding process. Both wire bonding and TAB bonding are fabricated
through thermal compressing. However, the flip chip bonding is fabricated via reflow
K.-L. Lin (B)
Department of Materials Science and Engineering, National Cheng Kung University, Tainan,
Taiwan, ROC
e-mail: matkllin@mail.ncku.edu.tw
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_11
329