Chapter 10
Fundamentals of Bonding Technology
and Process Materials for 2.5/3D
Packages
Sangil Lee
10.1 Introduction
3D packaging has moved to the forefront of the electronic packaging industry as the
demands toward higher performance, smaller form factor, and heterogeneous system
integration continue to grow. As a result, recent consumer electronic devices have
shown the adoption of 3-D packaging structures such as system in package (SIP),
package on package (PoP), and multi-chip module.
Wire bonding and Through Silicon Vias (TSVs) are interconnection technologies
that are the most widely used for the aforementioned 3D packages. The wire bonding
technology imposes limitation on the manufacturing throughput and number of I/O
counts due to point-to-point bonding process. In contrast, the TSV interconnects
theoretically can provide high throughput and fine pitch interconnections because
thin TSV micro-bumped die will be stacked on top of each other in order to create
3D packages. However, TSV technology still requires a lot of research to exhibit technical maturity that is similar to flip chip technology in view of assembly throughput
and reliability performance even after SK Hynix produced a high-performance 3D
stacked DRAM, Bandwidth Memory (HBM), which was implemented on AMD
Fiji GPU. The device manufacturers demonstrated the innovative TSV technology
by adopting newly developed bonding technique, Thermal Compression Bonding
(TCB), which controls force and heat applied to 3D packages. The in situ bonding
technology can complete a bonding cycle even in several seconds. This thermal
process cycle is singnificantly shorter than the traditional mass reflow process and
the instantly changing thermal condition has pushed key process materials such as
S. Lee (B)
Invensas Corporation, 3025 Orchard Parkway, San Jose, CA 95134, USA
e-mail: salee@invensas.com
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_10
259
Fundamentals of Bonding Technology
and Process Materials for 2.5/3D
Packages
Sangil Lee
10.1 Introduction
3D packaging has moved to the forefront of the electronic packaging industry as the
demands toward higher performance, smaller form factor, and heterogeneous system
integration continue to grow. As a result, recent consumer electronic devices have
shown the adoption of 3-D packaging structures such as system in package (SIP),
package on package (PoP), and multi-chip module.
Wire bonding and Through Silicon Vias (TSVs) are interconnection technologies
that are the most widely used for the aforementioned 3D packages. The wire bonding
technology imposes limitation on the manufacturing throughput and number of I/O
counts due to point-to-point bonding process. In contrast, the TSV interconnects
theoretically can provide high throughput and fine pitch interconnections because
thin TSV micro-bumped die will be stacked on top of each other in order to create
3D packages. However, TSV technology still requires a lot of research to exhibit technical maturity that is similar to flip chip technology in view of assembly throughput
and reliability performance even after SK Hynix produced a high-performance 3D
stacked DRAM, Bandwidth Memory (HBM), which was implemented on AMD
Fiji GPU. The device manufacturers demonstrated the innovative TSV technology
by adopting newly developed bonding technique, Thermal Compression Bonding
(TCB), which controls force and heat applied to 3D packages. The in situ bonding
technology can complete a bonding cycle even in several seconds. This thermal
process cycle is singnificantly shorter than the traditional mass reflow process and
the instantly changing thermal condition has pushed key process materials such as
S. Lee (B)
Invensas Corporation, 3025 Orchard Parkway, San Jose, CA 95134, USA
e-mail: salee@invensas.com
© The Editor(s) (if applicable) and The Author(s), under exclusive
license to Springer Nature Singapore Pte Ltd. 2021
Y. Li and D. Goyal (eds.), 3D Microelectronic Packaging,
Springer Series in Advanced Microelectronics 64,
https://doi.org/10.1007/978-981-15-7090-2_10
259