4 Microstructure and Mechanical Reliability Issues of TSV
93
temperature range, where there is sufficient thermal activation and time for diffusion, and the stresses in the TSV are high enough, grain boundary sliding is the
dominant mechanism, leading to significant surface relief of the TSV-top surface.
At high maximum temperature and slow heating rate, the stresses in the TSV are
substantially lower (because of stress relief by dislocation or diffusional creep), and
interfacial sliding dominates. This interplay between the stress state, heating rate and
maximum temperature of the thermal excursion typically results in a superposition
of all three of the effects shown in Fig. 4.23, although the effect of one or two of
these mechanisms is predominant.
4.3.2 Electromigration Related Effects
Although electromigration (EM) is a significant reliability issue in metallic interconnects in electronics, particularly in BEOL structures, TSVs are generally less
susceptible to EM induced failures. This is primarily due to their relatively large
cross-sections, which reduces the current density. However, the combination of electric current and complicated stress states above and below the TSV, where it joins
the BEOL or RDL structures, can cause substantial diffusional effects, and give rise
to EM-related void growth. FEA of the effects of stress-gradient, potential gradient
and temperature gradient on the atomic flux divergence (AFD), which correlates
with diffusional flow and hence electromigration, has noted AFDs are typically high
where the top and bottom metallizations meet the TSV [61]. A large proportion of the
AFD is due to the stress gradient generated due to Joule heating, with relatively little
due to the potential gradient. Still EM damage and void growth can occur. Generally,
strategies to reduce stress gradients will reduce void growth.
EM experiments on devices with thin as well as thick metal layers at the top
and bottom of TSVs generally show no void formation due to EM within the TSVs,
irrespective of the current flow direction [62, 63]. However, voids form downstream
of the direction of electron flow, at the intersection of TSV-end and the metal layer in
the RDL. It has been hypothesized that these voids nucleate because migration of Cu
atoms from the TSV to the void is prevented by the TiN barrier layer, but migration
out of the void region can occur into the Cu lines at the end of the TSV. Thus, the
layer of TiN, by being effective as a diffusion barrier, actually becomes the root
cause behind EM void nucleation. In thin Cu lines, voids occupy the entire thickness
of the line (between the TiN barrier and SiN capping layer). Current crowding at
the location where the electron current exits the TSV is greater for the thicker lines,
and therefore, thicker lines do not mitigate voiding. In thick lines, the voids are at
the interface between TiN and the Cu-line. Experimental electromigration studies
[64] have also shown voiding in backside Cu lines below the TSV downstream of
the electron flow direction, but at the SiN-Cu interface, as opposed to at the TiN-Cu
interface seen in Fig. 4.24. However, small voids present prior to EM experiments
inside the TSV remained unaltered. Thus, even though the TSVs themselves are
93
temperature range, where there is sufficient thermal activation and time for diffusion, and the stresses in the TSV are high enough, grain boundary sliding is the
dominant mechanism, leading to significant surface relief of the TSV-top surface.
At high maximum temperature and slow heating rate, the stresses in the TSV are
substantially lower (because of stress relief by dislocation or diffusional creep), and
interfacial sliding dominates. This interplay between the stress state, heating rate and
maximum temperature of the thermal excursion typically results in a superposition
of all three of the effects shown in Fig. 4.23, although the effect of one or two of
these mechanisms is predominant.
4.3.2 Electromigration Related Effects
Although electromigration (EM) is a significant reliability issue in metallic interconnects in electronics, particularly in BEOL structures, TSVs are generally less
susceptible to EM induced failures. This is primarily due to their relatively large
cross-sections, which reduces the current density. However, the combination of electric current and complicated stress states above and below the TSV, where it joins
the BEOL or RDL structures, can cause substantial diffusional effects, and give rise
to EM-related void growth. FEA of the effects of stress-gradient, potential gradient
and temperature gradient on the atomic flux divergence (AFD), which correlates
with diffusional flow and hence electromigration, has noted AFDs are typically high
where the top and bottom metallizations meet the TSV [61]. A large proportion of the
AFD is due to the stress gradient generated due to Joule heating, with relatively little
due to the potential gradient. Still EM damage and void growth can occur. Generally,
strategies to reduce stress gradients will reduce void growth.
EM experiments on devices with thin as well as thick metal layers at the top
and bottom of TSVs generally show no void formation due to EM within the TSVs,
irrespective of the current flow direction [62, 63]. However, voids form downstream
of the direction of electron flow, at the intersection of TSV-end and the metal layer in
the RDL. It has been hypothesized that these voids nucleate because migration of Cu
atoms from the TSV to the void is prevented by the TiN barrier layer, but migration
out of the void region can occur into the Cu lines at the end of the TSV. Thus, the
layer of TiN, by being effective as a diffusion barrier, actually becomes the root
cause behind EM void nucleation. In thin Cu lines, voids occupy the entire thickness
of the line (between the TiN barrier and SiN capping layer). Current crowding at
the location where the electron current exits the TSV is greater for the thicker lines,
and therefore, thicker lines do not mitigate voiding. In thick lines, the voids are at
the interface between TiN and the Cu-line. Experimental electromigration studies
[64] have also shown voiding in backside Cu lines below the TSV downstream of
the electron flow direction, but at the SiN-Cu interface, as opposed to at the TiN-Cu
interface seen in Fig. 4.24. However, small voids present prior to EM experiments
inside the TSV remained unaltered. Thus, even though the TSVs themselves are