RRAM-Based Neuromorphic Computing Systems
395
also known as conductive-bridge RAM (CBRAM) or electrochemical-metallization
memory (ECM). The most commonly used active metal electrodes are Ag and
Cu with electrochemically inert electrodes such as Au, Pt, and Ir. Wide variety
of compounds have been investigated as switching layer, which can be classified
into three major groups, i.e., solid electrolytes, oxides, and nitrides. They have been
known to have promising characteristics in terms of scalability, switching speed, and
programming power. In general, they also have lower operating voltage compared
to their anion devices counterpart. These desirable properties are due to the high
mobility of Cu and Ag ions within the switching layer. While having high ions
mobility is beneficial in terms of programming speed and power, it also raises challenges in device reliability, i.e., achieving high endurance and long retention. The
device failure has been reported to mainly due to excessive amount of metal species
residing inside the switching host. Furthermore, it also leads to generally abrupt and
stochastic switching operation. These challenges have especially been hindering the
cation-based devices application as artificial synapses in NN.
Based on the amount of metal cations involved during the switching operation,
the cation-based devices can be divided into two categories, i.e., infinite and finite
cations source devices.
a. Infinite Cations Source
Infinite cations source devices refer to devices that rely on active metal electrodes
as the source of the cations to facilitate the switching operation, as depicted on
Fig. 6. This configuration virtually enables infinite amounts of cations responsible
for the conductance change during the device operation. In agreement with the aforementioned challenges, the amount of metal species migrating within the switching
layer in this type of devices plays a critical role in the uniformity and reliability of
the device, especially in obtaining multilevel conductance characteristics for analog
synaptic device applications.
From the device programming viewpoint, multilevel conductance switching has
been demonstrated in cation-based devices by implementing different compliance
current values during the device operation [48–50]. Different compliance currents
lead to different amount of active metal ions injected and different conductive filament dimensions, allowing the device to have different values of conductance. This
operating scheme requires the use of a transistor to work in tandem with the RRAM
device to provide a precise current control through the device. Thus, it limits the
array level implementation to active array (1T1R) in which the footprint of a single
synapse will be limited by the transistor size. To achieve multibit per cell capability
in the device, constant drain to source voltage is required, while different voltage
pulse amplitudes are implemented to allow different current level flowing through
the RRAM device. This weight update scheme will require prior reading of the
conductance state before moving upward or downward on the weight level. This will
significantly slow down the training process and increase the amount of programming
energy due to additional overhead on the network circuitry. While this architecture
provides solution to achieve gradual long-term potentiation behavior during SET
395
also known as conductive-bridge RAM (CBRAM) or electrochemical-metallization
memory (ECM). The most commonly used active metal electrodes are Ag and
Cu with electrochemically inert electrodes such as Au, Pt, and Ir. Wide variety
of compounds have been investigated as switching layer, which can be classified
into three major groups, i.e., solid electrolytes, oxides, and nitrides. They have been
known to have promising characteristics in terms of scalability, switching speed, and
programming power. In general, they also have lower operating voltage compared
to their anion devices counterpart. These desirable properties are due to the high
mobility of Cu and Ag ions within the switching layer. While having high ions
mobility is beneficial in terms of programming speed and power, it also raises challenges in device reliability, i.e., achieving high endurance and long retention. The
device failure has been reported to mainly due to excessive amount of metal species
residing inside the switching host. Furthermore, it also leads to generally abrupt and
stochastic switching operation. These challenges have especially been hindering the
cation-based devices application as artificial synapses in NN.
Based on the amount of metal cations involved during the switching operation,
the cation-based devices can be divided into two categories, i.e., infinite and finite
cations source devices.
a. Infinite Cations Source
Infinite cations source devices refer to devices that rely on active metal electrodes
as the source of the cations to facilitate the switching operation, as depicted on
Fig. 6. This configuration virtually enables infinite amounts of cations responsible
for the conductance change during the device operation. In agreement with the aforementioned challenges, the amount of metal species migrating within the switching
layer in this type of devices plays a critical role in the uniformity and reliability of
the device, especially in obtaining multilevel conductance characteristics for analog
synaptic device applications.
From the device programming viewpoint, multilevel conductance switching has
been demonstrated in cation-based devices by implementing different compliance
current values during the device operation [48–50]. Different compliance currents
lead to different amount of active metal ions injected and different conductive filament dimensions, allowing the device to have different values of conductance. This
operating scheme requires the use of a transistor to work in tandem with the RRAM
device to provide a precise current control through the device. Thus, it limits the
array level implementation to active array (1T1R) in which the footprint of a single
synapse will be limited by the transistor size. To achieve multibit per cell capability
in the device, constant drain to source voltage is required, while different voltage
pulse amplitudes are implemented to allow different current level flowing through
the RRAM device. This weight update scheme will require prior reading of the
conductance state before moving upward or downward on the weight level. This will
significantly slow down the training process and increase the amount of programming
energy due to additional overhead on the network circuitry. While this architecture
provides solution to achieve gradual long-term potentiation behavior during SET