368
P. Huang et al.
electrodes. C P represents the intrinsic capacitance of the MIM structure of RRAM
cell.
Figure 22 shows the comparison between the calculated and measured electrical
characteristics of RRAM cell. It can be found that the compact model can reproduce
the gradual RESET and the abrupt SET processes under DC sweep, which are consistent with the measured data. During the RESET process, there is a negative feedback
between the speed of CF rupture and the decrease of electrical field and temperature
caused by the current drop and increase of CF gap. Hence, the RESET process is
gradual and multiple intermediate states can be achieved by the RESET operation
[13] as shown in Fig. 22a. Since different RESET voltages will lead to different gap
distance x of CF, multi-level HRS can be achieved with different stop voltages during
the RESET process as shown in Fig. 22a. Because of the positive feedback between
the CF growth and electrical field/temperature [25], the SET process is abrupt. So,
only binary states can be achieved during the SET process as shown in Fig. 22a. The
evolution rate of CF depends on the electric field in the gap region during the SET
Fig. 22 a The modeled DC
I-V curves during the
RESET and SET operation,
together with the measured
data. b Calculated and
measured transient response
current waveform for two
different RESET
programming schemes.
Reprinted from [22]
-4
-3
-2
-1
0
1
2
3
10
-9
10
-8
10
-7
10
-6
10
-5
10
-4
Symbol:Exp.
Line:Model
V stop =-3.3V
V stop =-2.7V
Current(A)
Voltage(V)
(a)
0
100
200
300
400
500
-200
-150
-100
-50
0
Respone current -2V/500ns
Respone current -2.3V/50ns
Model
Current
Time(ns)
(b)