262
M. Becherer
by stacking the highly planar 2D structures. With that, 3D monolithic computing
structures, interconnected by domain wall conduits in lateral direction (wire-shaped
ferromagnetic islands) and magnetic vias (established by coupling fields) in vertical
direction are achieved. As computation is taking place in a well defined volume—socalled nucleation centers of the islands—field-coupled vias and signal crossings are
achievable without electrical (metallic) interconnects. In other words, computation is
taking place in one part of a ferromagnetic island, whereas signal propagation takes
place in another part, where domain-walls propagate under an external magnetic field.
Electrical input is envisioned by e.g. current carrying (metallic) wires generating a
magnetic field to switch a close-by magnet or by running electrical current through
more complex magnetic arrangements like magnetic-tunnel-junctions (MTJs). Electrical output is implemented by Hall-elements, giant-magneto-resistance (GMR)- or
(MTJ)-structures. The clocking apparatus, a spatially homogeneous alternating magnetic field generated by a ferromagnetic on-chip inductor, corresponds to the ‘power
supply’ in CMOS circuits.
The book chapter is organized as follows: in Sect. 2, the concept of computing
in pNML devices is explained and 2D-pNML devices are reviewed. Section 3 is
highlighting the need for experimentally calibrated models to bridge the gap between
the micromagnetic domain and circuit level simulations. Section 4 addresses the
monolithic 3D integration of the presented 2D devices in order to keep up with
integration density and to provide field-coupled interconnects for signal distribution.
In Sect. 5, a co-processing unit as a potential BEOL CMOS process together with
an on-chip inductor for clock-field generation is described.
2 The Planar Technology of pNML—Fabrication of Devices
In this section, the pNML fabrication technology is summarized and the basic operating principles in 2D pNML are discussed. Furthermore, state-of-the-art 2D pNML
devices are introduced before the five tenets of digital computation are reviewed.
2.1 pNML Fabrication Technology
The basic materials for pNML are most commonly (but not limited to) sputter
deposited Co/Pt or Co/Ni multilayer stacks. With the single Co layer chosen not
thicker than in the order of 1.5 nm, the magnetization will align perpendicular to
the film surface. There is a complex interplay between shape anisotropy (a 2D
extended flat magnetic film) and crystalline/interfacial anisotropy [20, 21]. Multiple repetitions of non-magnet/ferromagnet (NM/FM) or ferromagnet/ferromagnet
(FM/FM) bilayers, enhance the anisotropy in perpendicular direction. In order to
identify prospective films for NML devices both high areal magnetization [mA] and
M. Becherer
by stacking the highly planar 2D structures. With that, 3D monolithic computing
structures, interconnected by domain wall conduits in lateral direction (wire-shaped
ferromagnetic islands) and magnetic vias (established by coupling fields) in vertical
direction are achieved. As computation is taking place in a well defined volume—socalled nucleation centers of the islands—field-coupled vias and signal crossings are
achievable without electrical (metallic) interconnects. In other words, computation is
taking place in one part of a ferromagnetic island, whereas signal propagation takes
place in another part, where domain-walls propagate under an external magnetic field.
Electrical input is envisioned by e.g. current carrying (metallic) wires generating a
magnetic field to switch a close-by magnet or by running electrical current through
more complex magnetic arrangements like magnetic-tunnel-junctions (MTJs). Electrical output is implemented by Hall-elements, giant-magneto-resistance (GMR)- or
(MTJ)-structures. The clocking apparatus, a spatially homogeneous alternating magnetic field generated by a ferromagnetic on-chip inductor, corresponds to the ‘power
supply’ in CMOS circuits.
The book chapter is organized as follows: in Sect. 2, the concept of computing
in pNML devices is explained and 2D-pNML devices are reviewed. Section 3 is
highlighting the need for experimentally calibrated models to bridge the gap between
the micromagnetic domain and circuit level simulations. Section 4 addresses the
monolithic 3D integration of the presented 2D devices in order to keep up with
integration density and to provide field-coupled interconnects for signal distribution.
In Sect. 5, a co-processing unit as a potential BEOL CMOS process together with
an on-chip inductor for clock-field generation is described.
2 The Planar Technology of pNML—Fabrication of Devices
In this section, the pNML fabrication technology is summarized and the basic operating principles in 2D pNML are discussed. Furthermore, state-of-the-art 2D pNML
devices are introduced before the five tenets of digital computation are reviewed.
2.1 pNML Fabrication Technology
The basic materials for pNML are most commonly (but not limited to) sputter
deposited Co/Pt or Co/Ni multilayer stacks. With the single Co layer chosen not
thicker than in the order of 1.5 nm, the magnetization will align perpendicular to
the film surface. There is a complex interplay between shape anisotropy (a 2D
extended flat magnetic film) and crystalline/interfacial anisotropy [20, 21]. Multiple repetitions of non-magnet/ferromagnet (NM/FM) or ferromagnet/ferromagnet
(FM/FM) bilayers, enhance the anisotropy in perpendicular direction. In order to
identify prospective films for NML devices both high areal magnetization [mA] and