76
Strain-Engineered MOSFETs
at greater distances (>2 μm) from the TSV faces. A fourfold symmetrical
Si Raman peak distribution around the TSV mirrors the TSV shape, but
may also be influenced by the cubic anisotropy in the Si elastic stiffness
matrix.
Figure 3.16 displays a Si Raman peak shift map and a corresponding linear
biaxial stress map from a 5 μm diameter, round Cu TSV (wafer A). A region
of compressive stress is observed in the Si within ~1–2 μm of the Cu TSV. In
regions farther away (>2 μm), the fourfold symmetric tensile stress distribution is observed. The presence of the fourfold symmetric stress field here
cannot be attributed to the TSV geometry. Consequently, it arises solely from
–500
–388.889
–277.778
–166.667
–55.556
55.556
166.667
277.778
388.889
[100]
[110]
Isotropic Si
(MPa)
[100]
(a)
(b)
( c)
[110]
[001]
500
–500
–388.889
–277.778
–166.667
–55.556
55.556
166.667
277.778
388.889
500
–500
–388.889
–277.778
–166.667
–55.556
55.556
166.667
277.778
388.889
500
[010]
[110]
FIGURE 3.14
Thermal stress distribution on the Si wafer surface: (a) σ xx with x axis along [100] crystal direction, (b) σ xx with x axis along [110] crystal direction, and (c) σ xx on an isotropic Si wafer (D f  =
20 μm, ΔT = −200°C). (After Lu, K. H., Thermo-Mechanical Reliability of 3-D Interconnects
Containing Through-Silicon-Vias (TSVs), PhD thesis, University of Texas at Austin, 2010.)