52
Strain-Engineered MOSFETs
References
1. C. K. Maiti and G. A. Armstrong, Applications of Silicon-Germanium Heterostructure
Devices, Institute of Physics Publishing (IOP), London, UK, 2001.
2. C. K. Maiti, N. B. Chakrabarti, and S. K. Ray, Silicon Heterostructures: Materials
and Devices, Institute of Electrical Engineers (IEE), London, UK, 2001.
3. B. S. Meyerson, UHV/CVD Growth of Si and Si-Ge Alloys: Chemistry, Physics,
and Device Applications, Proc. IEEE, 80, 1592–1608, 1992.
4. C. K. Maiti, Editorial in Special Issue on Strained-Si Heterostructures and
Devices, Solid-State Electronics, 48, 1255, 2004 (and references there in).
5. C. K. Maiti, S. Chattopadhyay, and L. K. Bera, Strained-Si Heterostructure Field
Effect Devices, CRC Press, Boca Raton, FL, 2007.
6. C. O. Chui, H. Kim, D. Chi, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, A
Sub-400°C Germanium MOSFET Technology with High-k Dielectric and Metal
Gate, IEEE IEDM Tech. Dig., 437–440, 2002.
7. C. Claeys and E. Simoen, Germanium-Based Technologies: From Materials to Devices,
Elsevier, Amsterdam, 2007.
8. H. Zang, W. Y. Loh, J. D. Ye, G. Q. Lo, and B. J. Cho, Tensile-Strained Germanium
CMOS Integration on Silicon, IEEE Electron Dev. Lett., 28, 1117–1119, 2007.
9. M. Y. A. Yousif, Silicon-Germanium for High-Performance CMOS Technology,
PhD thesis, Chalmers University of Technology and Goteborg University, 2001.
10. G. S. Kar, S. Maikap, S. K. Banerjee, and S. K. Ray, Series Resistance and Mobility
Degradation Factor in C-Incorporated SiGe Heterostructure p-Type Metal–
Oxide Semiconductor Field-Effect Transistors, Semicond. Sci. Technol., 17, 938–
941, 2002.
11. D. K. Nayak, K. Goto, A. Yutani, J. Murota, and Y. Shiraki, High-Mobility
Strained-Si PMOSFETs, IEEE Trans. Electron Dev., 43, 1709–1715, 1996.
12. C. K. Maiti, L. K. Bera, S. S. Dey, D. K. Nayak, and N. B. Chakrabarti, Hole
Mobility Enhancement in Strained-Si p-MOSFETs under High Vertical Fields,
Solid-State Electron., 41, 1863–1869, 1997.
13. H. S. Momose, T. O. K. Kojima, S. Nakamura, and Y. Toyoshima, 110 GHz Cutoff
Frequency of Ultra-Thin Gate Oxide P-MOSFETs on [110] Surface-Oriented Si
Substrate, VLSI Symp. Tech. Dig., 156–157, 2002.
14. M. Yang, V. W. C. Chan, K. K. Chan, L. Shi, D. M. Fried, J. H. Stahis, A. I.
Chou, E. Gusev, J. A. Ott, L. E. Burns, and M. V. Fischetti, Hybrid-Orientation
Technology (HOT): Opportunities and Challenges, IEEE Trans. Electron Dev., 53,
965–978, 2006.
15. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, Performance Enhancement
of p-MOSFETs with Embedded SiGe Source/Drain on Hybrid Orientation
Substrates, Proc. ULIS 2007, 2–6, 2007.
16. S. V. Joshi, Novel Channel Materials for Si Based MOS Devices: Ge, Strained
Si and Hybrid Crystal Orientations, PhD dissertation, University of Texas at
Austin, May 2007.
17. P. Zimmerman, High Performance Ge pMOS Devices Using a Si-Compatible
Process Flow, IEEE IEDM Tech. Dig., 261–264, 2006.
Strain-Engineered MOSFETs
References
1. C. K. Maiti and G. A. Armstrong, Applications of Silicon-Germanium Heterostructure
Devices, Institute of Physics Publishing (IOP), London, UK, 2001.
2. C. K. Maiti, N. B. Chakrabarti, and S. K. Ray, Silicon Heterostructures: Materials
and Devices, Institute of Electrical Engineers (IEE), London, UK, 2001.
3. B. S. Meyerson, UHV/CVD Growth of Si and Si-Ge Alloys: Chemistry, Physics,
and Device Applications, Proc. IEEE, 80, 1592–1608, 1992.
4. C. K. Maiti, Editorial in Special Issue on Strained-Si Heterostructures and
Devices, Solid-State Electronics, 48, 1255, 2004 (and references there in).
5. C. K. Maiti, S. Chattopadhyay, and L. K. Bera, Strained-Si Heterostructure Field
Effect Devices, CRC Press, Boca Raton, FL, 2007.
6. C. O. Chui, H. Kim, D. Chi, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, A
Sub-400°C Germanium MOSFET Technology with High-k Dielectric and Metal
Gate, IEEE IEDM Tech. Dig., 437–440, 2002.
7. C. Claeys and E. Simoen, Germanium-Based Technologies: From Materials to Devices,
Elsevier, Amsterdam, 2007.
8. H. Zang, W. Y. Loh, J. D. Ye, G. Q. Lo, and B. J. Cho, Tensile-Strained Germanium
CMOS Integration on Silicon, IEEE Electron Dev. Lett., 28, 1117–1119, 2007.
9. M. Y. A. Yousif, Silicon-Germanium for High-Performance CMOS Technology,
PhD thesis, Chalmers University of Technology and Goteborg University, 2001.
10. G. S. Kar, S. Maikap, S. K. Banerjee, and S. K. Ray, Series Resistance and Mobility
Degradation Factor in C-Incorporated SiGe Heterostructure p-Type Metal–
Oxide Semiconductor Field-Effect Transistors, Semicond. Sci. Technol., 17, 938–
941, 2002.
11. D. K. Nayak, K. Goto, A. Yutani, J. Murota, and Y. Shiraki, High-Mobility
Strained-Si PMOSFETs, IEEE Trans. Electron Dev., 43, 1709–1715, 1996.
12. C. K. Maiti, L. K. Bera, S. S. Dey, D. K. Nayak, and N. B. Chakrabarti, Hole
Mobility Enhancement in Strained-Si p-MOSFETs under High Vertical Fields,
Solid-State Electron., 41, 1863–1869, 1997.
13. H. S. Momose, T. O. K. Kojima, S. Nakamura, and Y. Toyoshima, 110 GHz Cutoff
Frequency of Ultra-Thin Gate Oxide P-MOSFETs on [110] Surface-Oriented Si
Substrate, VLSI Symp. Tech. Dig., 156–157, 2002.
14. M. Yang, V. W. C. Chan, K. K. Chan, L. Shi, D. M. Fried, J. H. Stahis, A. I.
Chou, E. Gusev, J. A. Ott, L. E. Burns, and M. V. Fischetti, Hybrid-Orientation
Technology (HOT): Opportunities and Challenges, IEEE Trans. Electron Dev., 53,
965–978, 2006.
15. T. K. Maiti, S. S. Mahato, S. K. Sarkar, and C. K. Maiti, Performance Enhancement
of p-MOSFETs with Embedded SiGe Source/Drain on Hybrid Orientation
Substrates, Proc. ULIS 2007, 2–6, 2007.
16. S. V. Joshi, Novel Channel Materials for Si Based MOS Devices: Ge, Strained
Si and Hybrid Crystal Orientations, PhD dissertation, University of Texas at
Austin, May 2007.
17. P. Zimmerman, High Performance Ge pMOS Devices Using a Si-Compatible
Process Flow, IEEE IEDM Tech. Dig., 261–264, 2006.