49
Substrate-Induced Strain Engineering in CMOS Technology
Si 0.83 Ge 0.17 pockets in the source and drain region induce compressive
stresses in different areas of the structure, including the channel. The effects
of mobility enhancement, induced by surface orientation change and also
process-induced strain, simultaneously, on the RF performance of p-MOSFETs are taken into account. The frequency response of the e-SiGe MOSFETs
was simulated in the common source configuration with f T as the unity gain
cutoff frequency. A cutoff frequency, f T , of about 240 GHz is predicted for
p-MOSFETs, in hybrid orientation technology involving process-induced
strain. It is found that the f T is higher in the <110> direction than in the <100>
direction. This result indicates the advantage of strain-dependent mobility enhancement along with hybrid orientation toward high-speed device
design. HOT seems promising because processes are directly compatible
with existing CMOS technology and strain engineering. The above discussion illustrates the benefits of using hybrid crystal orientation substrates for
significantly improving p-MOSFET performance. An obvious extension of
this approach is to implement alternative crystalline orientations of novel
channel materials, such as Ge. Epitaxial growth of Ge has been attempted on
bulk (110) Si wafers.
The advantages of both the (110) orientation and Ge for higher mobility can
be leveraged to attain a three times enhancement in the hole mobility compared to universal Si/SiO 2 hole mobility. Comparison of relative enhancement in low-field-hole mobility achieved by a combination of mobility
enhancement techniques, i.e., the use of new materials and alternative crystal
–0.1
0
0.1
STI
pMOSFET
<110>
nMOSFET
<100>
0.2
Y [um]
0.3
0.4
0.5
0.2
0.4
X [um]
0.6
0.8
1
FIGURE 2.26
Simulated strain-engineered MOS devices with hybrid orientation technology (HOT). (After
Maiti, T. K., Process-Induced Stress Engineering in Silicon CMOS Technology, PhD thesis,
Jadavpur University, 2009.)
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