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Substrate-Induced Strain Engineering in CMOS Technology
FIGURE 2.14
Schematic diagram illustrating the (a) Si p-MOSFET, (b) SQW SiGe p-MOSFET, and (c) DQW
SiGe p-MOSFET. (After Yousif, M. Y. A., Silicon-Germanium for High-Performance CMOS
Technology, PhD thesis, Chalmers University of Technology and Goteborg University, 2001.)
Substrate-Induced Strain Engineering in CMOS Technology
FIGURE 2.14
Schematic diagram illustrating the (a) Si p-MOSFET, (b) SQW SiGe p-MOSFET, and (c) DQW
SiGe p-MOSFET. (After Yousif, M. Y. A., Silicon-Germanium for High-Performance CMOS
Technology, PhD thesis, Chalmers University of Technology and Goteborg University, 2001.)