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Substrate-Induced Strain Engineering in CMOS Technology
to success has been the possibility of band gap engineering in silicon-based
materials. The SiGe technology is expected to boost the performance of
Si-based devices beyond that of Si. The gain in performance can be obtained
even with less aggressive downscaling, and thus improved reliability. In
the following, we discuss the channel-engineered MOSFETs using different structures of Si/Si 1–x Ge x /Si quantum wells and explain how a strained
Si 1–x Ge x layer of a few nanometers thick (typically 5–10 nm) epitaxially grown
on a Si substrate can be used as a quantum well to confine holes. The application of strained layers to heterostructure FETs is not as well developed
as HBTs. Although research in Si 1–x Ge x channel heterostructure MOSFETs is
gaining momentum, they are not expected to be in the Si-CMOS mainstream
before conventional Si counterparts reach the fundamental limit.
Though there is less development on SiGe heterostructure field-effect
transistors (HFETs) than on HBTs, they are very attractive because they are
compatible with standard Si CMOS technology and can perform better and
more reliably even with less downscaling. Despite the advantages of speed,
low noise, and low-power-delay product, the Si 1–x Ge x CMOS technology
is not free from drawbacks. These drawbacks include a high leakage current from the source/drain (S/D) to the substrate in devices fabricated on
relaxed Si 1–x Ge x virtual substrates due to the narrower band gap of the substrate. The film growth for Si/Si 1–x Ge x /Si strained layers has been discussed
earlier. Strained SiGe layers on Si substrates can be used as quantum well
(QW) channels to confine holes in p-MOSFETs with enhanced hole mobility
compared to conventional Si MOSFETs. Different structures of Si/Si 1–x Ge x /
Si, for example, single (SQW) and double (DQW) quantum well p-MOSFETs,
are considered. Threshold voltage, charge control, and short-channel effects
have been studied for these structures. A strained SiGe layer may be used
as a quantum well to engineer the channel of the p-MOSFET, and SiGe polycrystalline thin film may be used to engineer the gate of the transistor.
2.8.1 Band Alignment
Band engineering of Si and Ge can be used to produce band discontinuities
in the valence and conduction bands. Therefore, electrons and holes can be
confined in quantum wells. The strain plays a dominant role in determining the alignment of bands at heterointerface, thus determining the confinement energy of hole/electrons in the quantum wells. When a Si 1–x Ge x
layer is grown pseudomorphically on a relaxed Si substrate, a biaxial compressive strain will take place in the Si 1–x Ge x layer, which then serves as a
quantum well for holes. On the other hand, if a Si layer is grown epitaxially
on a relaxed Si 1–x Ge x layer, a biaxial tensile-strained Si layer will be formed,
which can then act as a quantum well for electrons (see Figure 2.12). For the
biaxial compressive strain, the in-plane lattice parameters become smaller to
be in registry with the underlying substrate, and the perpendicular lattice
parameter becomes larger. For the biaxial tensile strain, the in-plane lattice
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