23
Substrate-Induced Strain Engineering in CMOS Technology
Si
Si/Si 1–x Ge x
Si/Si 1–x–y Ge x C y
(Lattice matched)
a sub = a layer
Si/Si 1–y C y
a sub > a layer
a sub < a layer
Biaxial compressive strain
Unstrained
epitaxial layer
Biaxial tensile strain
or
Relaxation
or
Relaxation
Dislocation
Interstitial Precipitate
a layer
a sub
a x,y layer = a sub
a
x,y
layer = a sub
a z layer > a layer > a sub
a z layer < a layer < a sub
a sub
a sub
a sub
a layer
a layer
a layer
C
z x
y
Ge
FIGURE 2.4
Schematic presentation of lattice distortion in Si/SiGe:C systems. (After Hallstedt, J., Epitaxy
and Characterization of SiGe:C Layers Grown by Reduced Pressure Chemical Vapor Deposition,
PhD thesis, Royal Institute of Technology (KTH), Sweden, 2004.)