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Strain-Engineered MOSFETs
effect of carbon incorporation upon epitaxial growth and its role on strain
compensation in Si 1–x Ge x alloys. The major concern is to increase the carbon
incorporation rate by avoiding SiC precipitation. To participate in strain compensation, carbon must occupy substitutional sites within the SiGe lattice.
Because of the low solubility of carbon within Si, low-temperature growth
techniques are required. In the following, some details of SiGe:C epitaxial
growth using chemical vapour deposition (CVD) are discussed. Si and Ge
can be alloyed over the whole compositional range showing no intermediate phases; on the other hand, C alloying is significantly more complicated.
Studies have shown that up to 5% C can be incorporated in Si 1–y C y thin films,
which are several orders of magnitude larger than the equilibrium solubility
value. Therefore, all layers with C concentrations exceeding the solubility
limit are in a metastable state, and special care has to be taken in order to
avoid silicon-carbide formation during growth or postannealing treatments.
When a grown layer has a larger or smaller lattice constant than the substrate, then a mismatch system is established with compressive or tensile
strain. As a result of the induced strain, an elongation or shrinkage of lattice
parameters along the growth direction (out-of-plane) occurs, as shown in
Figure 2.4. The relaxation behaviour of these systems is also schematically
illustrated. The coordinate system is defined in Figure 2.4, where z denotes
the out-of-plane direction and x and y denote the in-plane direction.
2.4 Strained Si Films on Relaxed Si 1–x Ge x
The most widely used method to fabricate strained Si is epitaxial growth of
Si on a strain-relaxed buffer (SRB) SiGe layer. The relaxed buffer layer (RBL)
actually acts as virtual substrates. The strain-relaxed SiGe is created via
multilayer compositional grading from pure Si through to the final Si 1–x Ge x
alloy composition. This process minimises dislocation nucleation. Substrateinduced strain technologies have focused mainly on biaxial global strain
generated by epitaxial growth of a thin Si layer on a relaxed SiGe virtual
substrate. The Si layer is biaxial tensile strained in the plane of the interface
due to the lattice mismatch between Si and SiGe. A schematic diagram of
strained Si heteroepitaxy is shown in Figure 2.5. This result in enhanced carrier transport in the strained Si layer, and mobility enhancements of ~110%
for electrons and ~45% for holes have been demonstrated in sub-100 nm
strained Si MOSFETs [1].
A tensile-strained Si layer is grown on top of relaxed SiGe. The uniformity
of strain in the substrate is crucial to the success because of the high sensitivity of the band structure to strain. The main challenge in fabricating strained
Si is the control of defects, in the form of misfit dislocations, which cause
variation in strain. The most conventional way to grow relaxed SiGe is to
Strain-Engineered MOSFETs
effect of carbon incorporation upon epitaxial growth and its role on strain
compensation in Si 1–x Ge x alloys. The major concern is to increase the carbon
incorporation rate by avoiding SiC precipitation. To participate in strain compensation, carbon must occupy substitutional sites within the SiGe lattice.
Because of the low solubility of carbon within Si, low-temperature growth
techniques are required. In the following, some details of SiGe:C epitaxial
growth using chemical vapour deposition (CVD) are discussed. Si and Ge
can be alloyed over the whole compositional range showing no intermediate phases; on the other hand, C alloying is significantly more complicated.
Studies have shown that up to 5% C can be incorporated in Si 1–y C y thin films,
which are several orders of magnitude larger than the equilibrium solubility
value. Therefore, all layers with C concentrations exceeding the solubility
limit are in a metastable state, and special care has to be taken in order to
avoid silicon-carbide formation during growth or postannealing treatments.
When a grown layer has a larger or smaller lattice constant than the substrate, then a mismatch system is established with compressive or tensile
strain. As a result of the induced strain, an elongation or shrinkage of lattice
parameters along the growth direction (out-of-plane) occurs, as shown in
Figure 2.4. The relaxation behaviour of these systems is also schematically
illustrated. The coordinate system is defined in Figure 2.4, where z denotes
the out-of-plane direction and x and y denote the in-plane direction.
2.4 Strained Si Films on Relaxed Si 1–x Ge x
The most widely used method to fabricate strained Si is epitaxial growth of
Si on a strain-relaxed buffer (SRB) SiGe layer. The relaxed buffer layer (RBL)
actually acts as virtual substrates. The strain-relaxed SiGe is created via
multilayer compositional grading from pure Si through to the final Si 1–x Ge x
alloy composition. This process minimises dislocation nucleation. Substrateinduced strain technologies have focused mainly on biaxial global strain
generated by epitaxial growth of a thin Si layer on a relaxed SiGe virtual
substrate. The Si layer is biaxial tensile strained in the plane of the interface
due to the lattice mismatch between Si and SiGe. A schematic diagram of
strained Si heteroepitaxy is shown in Figure 2.5. This result in enhanced carrier transport in the strained Si layer, and mobility enhancements of ~110%
for electrons and ~45% for holes have been demonstrated in sub-100 nm
strained Si MOSFETs [1].
A tensile-strained Si layer is grown on top of relaxed SiGe. The uniformity
of strain in the substrate is crucial to the success because of the high sensitivity of the band structure to strain. The main challenge in fabricating strained
Si is the control of defects, in the form of misfit dislocations, which cause
variation in strain. The most conventional way to grow relaxed SiGe is to