284
Strain-Engineered MOSFETs
Lg
170
Strain
2.5
Ge
1.62e+22
StressXX
2.03e+09
–10
–1.5
1.27e+21 –3.73e+09 –0.517
–0.428 –0.00172 –1.92e+03 –0.000358 –0.00112
–117
Vtgm
0.295
Vti
0.176
IdMax
0.00407
roLin
203
Ioff
0.00136
gm
0.00246
SS
–63.6
(a) PSS p-MOSFETs
1.20e+02
7.27e+21
1.05e+22
1.25e+09
1.21e–01
3.04e–03
2.94e+01
2.12e–03
–6.62e+01
5.97e–04
–9.37e+01
–1.21e+03
–1.04e–03
??
??
–3.67e–01
–4.31e–01
–3.11e+09
0.00e+00
Lg
SiN
Strain
StressXX
Vd
Vtgm
Vti
IdMax roLin
Ioff
g m
S S
200
0.089
2.5
1.52e+09
–40
0.041
–1.5
–1.75 –8.41e+08 0.102
–0.171 –0.00252 –252 –1.66e–07 –0.00238
45.9
3.05
0.556
0.627
0.00661
901
0.000442 0.00589
136
??
7.50e–02
1.44e+09
5.28e–01 5.62e–01
7.99e+02
4.63e–03
3.44e–01
6.25e–02
–3.00e+01
–1.77e+02
–2.35e+03
2.76e–07
–2.11e–03 ??
4.71e–03
??
7.50e–02
(b) PSS n-MOSFETs
FIGURE 10.6
(a) Parallel coordinate plot for process-induced strained Si p-MOSFETs created using PCM
Studio, showing sensitivity analysis of design parameters and yield constraint variables. (b)
Parallel coordinate plot for process-induced strained Si n-MOSFETs created using PCM Studio,
showing sensitivity analysis of design parameters and yield constraint variables.