269
Process Compact Modelling of Strain-Engineered MOSFETs
simulations using Sentaurus Device. The TCAD simulations are compared
with the HSPICE simulations using the process-aware model. In the case
of the circuit simulations performed using Paramos and the process-aware
model parameters, a stress-dependent threshold voltage is added to account
for the circuit performance. Switching characteristics using a process-aware
model for the PSS-CMOS inverter is shown in Figure 9.17, where input voltage and output voltage flowing through the n-MOSFETs are illustrated. The
results from simulations are also compared to SPICE simulations performed
using the process-aware model parameters [10, 12]. In addition, the absolute
model error is calculated using
Error
Q
Q
Q
N
(
) /
SPICE
T CAD
TCAD
2
=
−
Σ
(9.8)
which indicates the model accuracy. These studies demonstrate the accuracy
and robustness of the process-aware circuit model parameters and their suitability for possible applications in strain-engineered CMOS standard cells,
as well as more complex circuit elements.
9.6 Summary
In this chapter, the predictive technology model of MOSFETs, which offers
a generic, open-source tool for early-stage design research, has been introduced. A systematic study based on technology CAD is taken up for the
1.0
0.8
V in
V out
0.6
0.4
0.2
0.0
0.0
1.0×10 –10
Time (s)
Voltage (V)
2.0×10
–10
FIGURE 9.17
Switching characteristics for the PSS-CMOS inverter.