253
Process Compact Modelling of Strain-Engineered MOSFETs
PTM can be easily customised to cover a wide range of process uncertainties.
Furthermore, PTM captures the sensitivity to process variations.
Combining 10 primary parameters, e.g., V dd , T oxe , L eff , V th0 , R dsw , N ch , E ta0 , K 1 ,
m 0 , and V sat , PTM can be extrapolated toward future technology nodes. The
rest of the model parameters of the compact transistor model are secondary
ones. There are no explicit models to predict their values. Furthermore, their
values can be adjusted to cover a range of process uncertainties from intrinsic process variations. In general, the error introduced by considering only
the primary parameters can be reduced to 5% [3]. Smooth and accurate predictions are obtained from 250 nm to 32 nm nodes, with L eff as low as 13 nm.
The new predictive methodology reported has better scalability over a wide
range of process and design conditions.
Based on the collected data, Figure 9.2 presents the trend of equivalent oxide
thickness (EOT). EOT is steadily scaling down, although the pace may slow
down. The trend of V dd and V th scaling is plotted in Figure 9.3, where the value
of V th is extracted from the subthreshold I-V curves. Due to the concern of subthreshold leakage, V th almost stays the same in the nanoscale. The fifth technology parameter, R dsw , is extracted by fitting the I-V curves in the linear region,
after low-filed mobility, μ o , is predicted. The trend of R dsw is shown in Figure 9.4.
The reduction of R dsw becomes more difficult in short-channel devices. These
trends, which are supported by experimental data, are then integrated into
PTM to predict the nominal values during CMOS technology scaling.
Values of technology specifications not only define the basic characteristics of a process, but also further determine other important electrical
FIGURE 9.1
A simple method fails to predict the overall I-V characteristics. (After Zhao, W., Predictive
Technology Modelling for Scaled CMOS, PhD thesis, Arizona State University, 2009.)
Process Compact Modelling of Strain-Engineered MOSFETs
PTM can be easily customised to cover a wide range of process uncertainties.
Furthermore, PTM captures the sensitivity to process variations.
Combining 10 primary parameters, e.g., V dd , T oxe , L eff , V th0 , R dsw , N ch , E ta0 , K 1 ,
m 0 , and V sat , PTM can be extrapolated toward future technology nodes. The
rest of the model parameters of the compact transistor model are secondary
ones. There are no explicit models to predict their values. Furthermore, their
values can be adjusted to cover a range of process uncertainties from intrinsic process variations. In general, the error introduced by considering only
the primary parameters can be reduced to 5% [3]. Smooth and accurate predictions are obtained from 250 nm to 32 nm nodes, with L eff as low as 13 nm.
The new predictive methodology reported has better scalability over a wide
range of process and design conditions.
Based on the collected data, Figure 9.2 presents the trend of equivalent oxide
thickness (EOT). EOT is steadily scaling down, although the pace may slow
down. The trend of V dd and V th scaling is plotted in Figure 9.3, where the value
of V th is extracted from the subthreshold I-V curves. Due to the concern of subthreshold leakage, V th almost stays the same in the nanoscale. The fifth technology parameter, R dsw , is extracted by fitting the I-V curves in the linear region,
after low-filed mobility, μ o , is predicted. The trend of R dsw is shown in Figure 9.4.
The reduction of R dsw becomes more difficult in short-channel devices. These
trends, which are supported by experimental data, are then integrated into
PTM to predict the nominal values during CMOS technology scaling.
Values of technology specifications not only define the basic characteristics of a process, but also further determine other important electrical
FIGURE 9.1
A simple method fails to predict the overall I-V characteristics. (After Zhao, W., Predictive
Technology Modelling for Scaled CMOS, PhD thesis, Arizona State University, 2009.)