230
Strain-Engineered MOSFETs
SiO 2 /Si substrate interface by a combination of electric field, temperature,
and holes, resulting in dangling bonds or interface traps at that interface.
Various NBTI models have been proposed in the literature, of which the
reaction-diffusion (R-D) model and the disorder-control-kinetics (DCK)
are the most prevalent. In the R-D model, interface traps are generated at
the SiO 2 /Si interface (reaction) with a linear dependence on stress time.
Hydrogen is released during the reaction phase and in the subsequent diffusion phase; the hydrogen diffuses away from the interface into the oxide.
In this chapter we focus on distinguishing the interfacial defects intrinsic to the presence of strain from extrinsic defects associated with specific
processing conditions and device geometry, which can be alleviated by
processing optimisation. Some extrinsic factors, such as germanium outdiffusion from a virtual Si 1–x Ge x substrate and hydrogen diffusion from
hydrogen-rich CESL liners, can become a reason for reliability deterioration of devices with process-induced strain.
Although the negative bias temperature instability in p-MOSFETs has
attracted a lot of attention, for the positive bias temperature instability
in n-MOSFETs relatively little has been published. The main reason for
this is due to negligible PBTI effects observed in n-MOSFETs with SiO 2
or SiON dielectrics. However, with the introduction of high-k gate dielectrics, it can be an important reliability issue. PBTI is mostly described as
electron trapping in native traps in the high-k layer. Intrinsic defects at
the Si/SiO 2 interface are important in the operation of MOSFET devices.
Unsaturated dangling bonds occur at the interface between the Si substrate and the oxide. Dangling bonds are formed at the interfaces between
two materials with different lattice constants as a result of mismatch. The
appearance of the dangling bonds depends on the crystallographic interface orientation.
MOSFETs gate oxide quality degrades during device operation and cannot retain its original condition. One general degradation type is defect generation in the oxide bulk or at the Si/SiO 2 interface over time. These defects
increase leakage current through the gate dielectric, change transistor metrics such as the threshold voltage, or result in the device failure due to oxide
breakdown. A very important step in the evaluation of these devices is the
assessment of their reliability performance. The bias temperature instabilities
(BTIs) are of utmost importance for determining the lifetime of the devices.
Most NBTI measurements are made by stressing the device, then measuring the threshold voltage, interface trap density, drain current, transconductance, and other device parameters. There is usually a time delay between
stress and characterisation, and the delay time is generally not mentioned in
the literature. But the time delay is very important, as it may take seconds to
generate NBTI damage, but the recovery is much faster, generally within a
few microseconds. However, it is not clear if the NBTI damage recovers completely. It has been proposed that the damage consists of two degradation
Précédent

- 252/311

Suivant