120
Strain-Engineered MOSFETs
junction, (2) leakage current due to the subthreshold leakage, (3) current
due to the tunneling of carriers through the thin gate oxide, (4) current flowing in the gate because of an injection of hot carriers, (5) current because of
gate-induced drain lowering (GIDL), and (6) current because of a channel
punch-through. When the electric field across a reverse-biased p-n junction
approaches 10 6 V/cm, significant current flow can occur due to tunneling of
electrons from the valence band of the p-region into the conduction band of
the n-region. The band-to-band tunneling poses as a limit to CMOS scaling.
As CMOS channel length is scaled to 10 nm or below, the source-to-drain
direct tunneling becomes the dominant leakage.
5.1.3 Metal Gate Electrodes
A significant advantage of employing a midgap metal arises from a symmetrical V th value for both n- and p-MOSFETs, because by definition the
same energy difference exists between the metal Fermi level and the conduction and valence bands of Si. In order to continue device scaling, high-k
gate dielectrics are required, and metal gates show superior compatibility
over silicon gates. The work function is an essential parameter in optimising electrical characteristics, specifically the threshold voltage. A polysilicon
gate has the advantage that it can be doped p-type or n-type, shifting the
work function so that it is suitable for n- and p-MOSFET devices, thereby
simplifying integration. As gate oxide thickness decreases, the capacitance
associated with the depleted layer at the poly-Si/gate dielectric interface
becomes significant, making it necessary to consider alternative gate electrodes. The search for metallic gates faces many challenges since they must
have compatible work functions, thermal/chemical interface stability with
underlying dielectric, and high carrier concentration. Metal gates promise
to solve several issues, such as poly-gate electrode depletion effects, boron
penetration, stability with alternate high-k dielectrics, and decreased gate
resistance as devices are scaled down further.
Metal gates are promising candidates to replace the conventional polycrystalline silicon gate electrode. Midgap metal can afford a simpler CMOS
processing scheme, since only one mask and one metal would be required
for the gate electrode. For alternative metal gate electrode, in addition to the
work function requirements, the metal gate and the high-k gate dielectric
should be mutually compatible and not interdiffuse or react at the MOSFET
thermal budget. Binary metal alloys of Ru and Ta as candidates for CMOS
gate electrodes have been proposed. It was reported that Ru-Ta alloys are
excellent n-MOSFET gate electrode candidates since they exhibit low work
functions and demonstrate superior thermal stability compared to Ta. These
metal alloys also offer work function tuning capability. Moreover, by increasing the Ru concentration of this alloy, excellent PMOS gate characteristics
were achieved. An intermixed stack of Ru and Ta has been investigated as a
route to obtaining ease of integration.
Strain-Engineered MOSFETs
junction, (2) leakage current due to the subthreshold leakage, (3) current
due to the tunneling of carriers through the thin gate oxide, (4) current flowing in the gate because of an injection of hot carriers, (5) current because of
gate-induced drain lowering (GIDL), and (6) current because of a channel
punch-through. When the electric field across a reverse-biased p-n junction
approaches 10 6 V/cm, significant current flow can occur due to tunneling of
electrons from the valence band of the p-region into the conduction band of
the n-region. The band-to-band tunneling poses as a limit to CMOS scaling.
As CMOS channel length is scaled to 10 nm or below, the source-to-drain
direct tunneling becomes the dominant leakage.
5.1.3 Metal Gate Electrodes
A significant advantage of employing a midgap metal arises from a symmetrical V th value for both n- and p-MOSFETs, because by definition the
same energy difference exists between the metal Fermi level and the conduction and valence bands of Si. In order to continue device scaling, high-k
gate dielectrics are required, and metal gates show superior compatibility
over silicon gates. The work function is an essential parameter in optimising electrical characteristics, specifically the threshold voltage. A polysilicon
gate has the advantage that it can be doped p-type or n-type, shifting the
work function so that it is suitable for n- and p-MOSFET devices, thereby
simplifying integration. As gate oxide thickness decreases, the capacitance
associated with the depleted layer at the poly-Si/gate dielectric interface
becomes significant, making it necessary to consider alternative gate electrodes. The search for metallic gates faces many challenges since they must
have compatible work functions, thermal/chemical interface stability with
underlying dielectric, and high carrier concentration. Metal gates promise
to solve several issues, such as poly-gate electrode depletion effects, boron
penetration, stability with alternate high-k dielectrics, and decreased gate
resistance as devices are scaled down further.
Metal gates are promising candidates to replace the conventional polycrystalline silicon gate electrode. Midgap metal can afford a simpler CMOS
processing scheme, since only one mask and one metal would be required
for the gate electrode. For alternative metal gate electrode, in addition to the
work function requirements, the metal gate and the high-k gate dielectric
should be mutually compatible and not interdiffuse or react at the MOSFET
thermal budget. Binary metal alloys of Ru and Ta as candidates for CMOS
gate electrodes have been proposed. It was reported that Ru-Ta alloys are
excellent n-MOSFET gate electrode candidates since they exhibit low work
functions and demonstrate superior thermal stability compared to Ta. These
metal alloys also offer work function tuning capability. Moreover, by increasing the Ru concentration of this alloy, excellent PMOS gate characteristics
were achieved. An intermixed stack of Ru and Ta has been investigated as a
route to obtaining ease of integration.