91
Electronic Properties of Strain-Engineered Semiconductors
( , , )
1 2
3
e e e
′ ′ ′ , which is a common operation), the following transformation rule
between two coordinate systems is applied:
12
a a
ik jl kl
′
σ =
σ
(4.4)
where a is the rotation matrix
, /
a
e e
e e
ik
i
k
i
k
(
)
(
)
= ′
′
(4.5)
4.2.1 Modelling of Stress Generation
In this section, a software-based approach is presented to engineer
the stress generated in the MOSFET channel, with an ultimate goal of
enhancing the device performance. This is the common and most effective approach adopted in the semiconductor industry to model processinduced stress. SProcess (Sentaurus Process) is a process simulator [11]
that simulates standard process simulation steps like oxidation, diffusion,
implantation, etching, etc. SProcess accepts sequence of commands at the
command prompt. The process flow is simulated by issuing a sequence
of commands that correspond to the individual process steps. SProcess
is written in Tool Command Language (Tcl), so all Tcl commands and
functionalities are supported by the software. SProcess supports several
mechanical models to compute mechanical stress, such as viscous, viscoelastic, elastic, plasticity, etc. All simulations in this work are performed
using the elastic model.
4.3 Strain-Engineered MOSFETs: Current
The switching speed of an ideal transistor can be increased primarily by two
ways: physical gate length scaling and carrier mobility enhancement [12].
Strained Si increases the switching speed solely by enhancing the carrier
mobility. The carrier mobility is given by [13]
*
q m
µ =
τ
(4.6)
where 1/τ = scattering rate and m* = conductivity effective mass. The carrier mobility is enhanced by strain by reducing the effective mass or the
scattering rate. Electron mobility is enhanced by both phenomena, while for
holes, only mass change due to band warping is known to play a significant
role at the current stress levels in production. The simple drain current (I D )
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