Appendix B: Registers
141
Write
1. Set CHRGADD (Channel register address) to the address of the channel register
that you wish to write to.
2. Set the data to write at CHRGWDATH:CHRGWDATL (Channel register write
data).
3. Set CHRGCTL[6] (Channel register control) high for write, set CHRGCTL[5]
high if you wish to write the same value to all channels (broadcasting), set
CHRGCTL[4:0] to the channel number that you wish to write the data to. When
broadcasting the channel number is ignored.
Read
1. Set CHRGADD to the address of the channel register that you wish to read from.
2. Set CHRGCTL[6] low for read, set CHRGCTL[4:0] to the channel number that
you wish to read from. Broadcast (CHRGCTL[5]) is ignored for reads.
3. The data will appear at CHRGRDATH:CHRGRDATL (Channel register read
data).
Pedestal memory write
1. Make sure the data path configuration for the channel to be written to (DPCFG,
see Table B.9) is not using a lookup function f( ), as the lookup function utilizes
the pedestal memory and will cause corrupted writes.
2. Set PMADDH:PMADDL (Pedestal memory address) to the address in the
pedestal memory that you wish to write to.
3. Set CHRGADD to 0x10 which is the address for PMDATA (Pedestal memory
data) in the channel register.
4. Set the data to write at CHRGWDATH:CHRGWDATL.
5. Set CHRGCTL[7] high to automatically increment the currently set pedestal
memory address (increment before write), set CHRGCTL[6] high for write, set
CHRGCTL[5] high if you wish to write the same value to all channels (broadcasting), set CHRGCTL[4:0] to the channel number that you wish to write to.
When broadcasting the channel number is ignored.
Pedestal memory read
1. Make sure the data path configuration for the channel to be read from (DPCFG,
see Table B.9) is not using a lookup function f( ), as the lookup function utilizes
the pedestal memory and will cause corrupted reads.
2. Set the address in the pedestal memory that you wish to read from at
PMADDH:PMADDL.
3. Put the register address for the channel register PMDATA (0x10) at CHRGADD.
4. Set CHRGCTL[7] high to automatically increment the currently set pedestal
memory address (increment before read), set CHRGCTL[6] low for read, set
CHRGCTL[4:0] to the channel that you wish to read from. Broadcast
(CHRGCTL[5]) is ignored for reads.
5. The data will appear at CHRGRDATH:CHRGRDATL.
141
Write
1. Set CHRGADD (Channel register address) to the address of the channel register
that you wish to write to.
2. Set the data to write at CHRGWDATH:CHRGWDATL (Channel register write
data).
3. Set CHRGCTL[6] (Channel register control) high for write, set CHRGCTL[5]
high if you wish to write the same value to all channels (broadcasting), set
CHRGCTL[4:0] to the channel number that you wish to write the data to. When
broadcasting the channel number is ignored.
Read
1. Set CHRGADD to the address of the channel register that you wish to read from.
2. Set CHRGCTL[6] low for read, set CHRGCTL[4:0] to the channel number that
you wish to read from. Broadcast (CHRGCTL[5]) is ignored for reads.
3. The data will appear at CHRGRDATH:CHRGRDATL (Channel register read
data).
Pedestal memory write
1. Make sure the data path configuration for the channel to be written to (DPCFG,
see Table B.9) is not using a lookup function f( ), as the lookup function utilizes
the pedestal memory and will cause corrupted writes.
2. Set PMADDH:PMADDL (Pedestal memory address) to the address in the
pedestal memory that you wish to write to.
3. Set CHRGADD to 0x10 which is the address for PMDATA (Pedestal memory
data) in the channel register.
4. Set the data to write at CHRGWDATH:CHRGWDATL.
5. Set CHRGCTL[7] high to automatically increment the currently set pedestal
memory address (increment before write), set CHRGCTL[6] high for write, set
CHRGCTL[5] high if you wish to write the same value to all channels (broadcasting), set CHRGCTL[4:0] to the channel number that you wish to write to.
When broadcasting the channel number is ignored.
Pedestal memory read
1. Make sure the data path configuration for the channel to be read from (DPCFG,
see Table B.9) is not using a lookup function f( ), as the lookup function utilizes
the pedestal memory and will cause corrupted reads.
2. Set the address in the pedestal memory that you wish to read from at
PMADDH:PMADDL.
3. Put the register address for the channel register PMDATA (0x10) at CHRGADD.
4. Set CHRGCTL[7] high to automatically increment the currently set pedestal
memory address (increment before read), set CHRGCTL[6] low for read, set
CHRGCTL[4:0] to the channel that you wish to read from. Broadcast
(CHRGCTL[5]) is ignored for reads.
5. The data will appear at CHRGRDATH:CHRGRDATL.