Appendix B
Registers
The SAMPA contains two types of registers; global and channel. The global registers are directly accessible through the I
2 C interface and contain configuration that
concerns the main operation of the device or configurations that are common to all
channels. The channel registers exist in each channel and contain configuration that
can be individually set for each channel. The channel registers are only accessible
via the global register, as explained in Sect. B.1.3.
B.1 Global Registers
The full list of global registers is listed in Tables B.1 and B.2. Following is the
extended description of the registers.
B.1.1 Pin Status
These registers show the status of input pins on the SAMPA.
HWADD (Hardware address) The device address. It is used both as the device’s
I
2 C address as well as a source indicator in the header of the data packets sent to
the readout unit.
CLKCONF (Clock configuration) Status of the clk_config pins used for controlling the internal clock division.
BOUNDARY Gives the status of the trigger inputs and the daisy chaining pins.
© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer
Nature Switzerland AG 2021
A. Velure, A Digital Signal Processor for Particle Detectors, Springer Theses,
https://doi.org/10.1007/978-3-030-71559-5
135
Registers
The SAMPA contains two types of registers; global and channel. The global registers are directly accessible through the I
2 C interface and contain configuration that
concerns the main operation of the device or configurations that are common to all
channels. The channel registers exist in each channel and contain configuration that
can be individually set for each channel. The channel registers are only accessible
via the global register, as explained in Sect. B.1.3.
B.1 Global Registers
The full list of global registers is listed in Tables B.1 and B.2. Following is the
extended description of the registers.
B.1.1 Pin Status
These registers show the status of input pins on the SAMPA.
HWADD (Hardware address) The device address. It is used both as the device’s
I
2 C address as well as a source indicator in the header of the data packets sent to
the readout unit.
CLKCONF (Clock configuration) Status of the clk_config pins used for controlling the internal clock division.
BOUNDARY Gives the status of the trigger inputs and the daisy chaining pins.
© The Editor(s) (if applicable) and The Author(s), under exclusive license to Springer
Nature Switzerland AG 2021
A. Velure, A Digital Signal Processor for Particle Detectors, Springer Theses,
https://doi.org/10.1007/978-3-030-71559-5
135