100
4 Verification and Testing
Table 4.1 Code coverage summary of module based tests
Module
Total coverage v2 (%)
Total coverage v3 (%)
Pre-trigger
98.1
100
Digital shaper
94.2
95.7
Baseline Correction 1
96.6
96.9
Baseline Correction 2
95.5
93.1
Baseline Correction 3
100
100
Zero suppression unit
98.5
100
JTAG
82.2
100
I 2 C
98.8
100
Event manager
86.3
100
Huffman
94.6
100
Neighbour control
100
100
Neighbour ring buffer
99.5
99.5
Data-formatting/compressing
unit
44.9 (only Huffman)
100
Ring buffer input/output
–
100
Clock generator
98.1
100
Ring oscillator
98
100
Hamming encoder
100
100
Hamming decoder
100
100
SAMPA, the boxes marked in grey are excluded from the simulation to increase the
simulation speed. By changing another parameter at compile time, it is possible to
run the simulations with gate level code, both with or without back annotated timing.
A wrapper encapsulates the SAMPA code to model some of the analogue behaviours,
like for instance the I
2 C tristate driver and the SLVS enable signals.
The serial link data checkers operate independently from the test sequencer. In case
of certain tests where checking is not needed, they can be disabled to avoid generating
unnecessary errors. The task of each checker is to automatically synchronize to the
incoming data, like a real serial receiver, do integrity checks on the packet header,
verify the header and data are without any parity or Hamming errors, compare the
received header and data against the next expected header and data received from the
behavioural model, do a decompression test of the data to verify that the compressed
data fits with the raw input data and finally do a graceful self-recovery in case
unexpected errors occur, so that testing can continue from the next packet.
If the serial link checker has been marked as not being the last checker in a chain
it additionally puts the output data in a buffer to be checked by the next checker
in the chain. Since each serial link checker has knowledge of which chip address it
receives data from, it ignores the packet that is not from the expected chip address
and forwards them directly to the buffer.
4 Verification and Testing
Table 4.1 Code coverage summary of module based tests
Module
Total coverage v2 (%)
Total coverage v3 (%)
Pre-trigger
98.1
100
Digital shaper
94.2
95.7
Baseline Correction 1
96.6
96.9
Baseline Correction 2
95.5
93.1
Baseline Correction 3
100
100
Zero suppression unit
98.5
100
JTAG
82.2
100
I 2 C
98.8
100
Event manager
86.3
100
Huffman
94.6
100
Neighbour control
100
100
Neighbour ring buffer
99.5
99.5
Data-formatting/compressing
unit
44.9 (only Huffman)
100
Ring buffer input/output
–
100
Clock generator
98.1
100
Ring oscillator
98
100
Hamming encoder
100
100
Hamming decoder
100
100
SAMPA, the boxes marked in grey are excluded from the simulation to increase the
simulation speed. By changing another parameter at compile time, it is possible to
run the simulations with gate level code, both with or without back annotated timing.
A wrapper encapsulates the SAMPA code to model some of the analogue behaviours,
like for instance the I
2 C tristate driver and the SLVS enable signals.
The serial link data checkers operate independently from the test sequencer. In case
of certain tests where checking is not needed, they can be disabled to avoid generating
unnecessary errors. The task of each checker is to automatically synchronize to the
incoming data, like a real serial receiver, do integrity checks on the packet header,
verify the header and data are without any parity or Hamming errors, compare the
received header and data against the next expected header and data received from the
behavioural model, do a decompression test of the data to verify that the compressed
data fits with the raw input data and finally do a graceful self-recovery in case
unexpected errors occur, so that testing can continue from the next packet.
If the serial link checker has been marked as not being the last checker in a chain
it additionally puts the output data in a buffer to be checked by the next checker
in the chain. Since each serial link checker has knowledge of which chip address it
receives data from, it ignores the packet that is not from the expected chip address
and forwards them directly to the buffer.