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7 Countermeasures Against Hardware Trojans
Fig. 7.12 Diagrams of state transitions of the main FSM in IIPS (a) and embedded FSM of the
scan control activation (b)
of the scan chain. After enabling the scan chain, M-FSM can be set in ScanPUF
or TrojDet state to perform ScanPUF authentication or hardware Trojan detection
accordingly.
In this structure, SCEN state precedes e ScanPUF and TrojDet states, because
both ScanPUF and Trojan detection require at least one active scan chain. Specific
sequences of vectors are required for M-FSM to switch among different security
functions, acting both as an authentication mechanism and to prevent unintentional
trigger of a function. When performing each IIPS function, M-FSM stays in the
corresponding state; when the task is completed, M-FSM can be reset to IDLE
state with IIPS reset signal IIPS _RSTN. The SC_LOCK and TD_LOCK states
are two locking states designed to support scan chain-based SoC testing and delayfault testing. When IIPS is deactivated or in the locking states, intact test signals
are propagated to other functional cores. During IIPS security functions, modified
(in ScanPUF and TrojDet) or deasserted (in SC EN) signals will be applied to the
functional cores.
All IEEE 1500 compliant SoCs have a standard active low test reset signal
WRSTN. Since the test inputs WSP usually reuse chip functional inputs, WRSTN
is required to separate the test mode from functional mode by interpreting the
inputs as test signals, and consequently configuring the test infrastructure as well
as propagating test data.
Similarly, only one extra input pin IIPS RSTN is needed in the SoC to provide
an active low reset signal for IIPS. Active IIPS_RSTN disables the IIPS by setting
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