6.8.4 Examples of Designing Trigger Circuits with Enhanced
Protection from Re-engineering . . . . . . . . . . . . . . . . . . . 638
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 644
7 Countermeasures Against Hardware Trojans . . . . . . . . . . . . . . . . . . 647
7.1 Hardware and Software Methods of Countering Hardware
Trojans in Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
7.1.1 Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
7.1.2 Protected Architectures on the RTL Level . . . . . . . . . . . 651
7.1.3 Reconfigurable Architectures . . . . . . . . . . . . . . . . . . . . . 652
7.1.4 Replication and Other Protection Methods . . . . . . . . . . . 655
7.2 A Trojan-Resistant System-on-Chip Bus Architecture . . . . . . . . . 657
7.2.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 657
7.2.2 Structure and Operating Principle of a Standard SoC
Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 658
7.2.3 Organization and Operating Principle of Address
Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 659
7.2.4 Structure and Operation Principle of the Arbiter
Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
7.2.5 Description of Operation of a System on Chip
Immediately After Detection of a Hardware Trojan . . . . 665
7.3 Using the IEEE Std. 1500 Standard in Order to Ensure Safety
of Systems on Chips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
7.3.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 667
7.3.2 Introduction to IP Infrastructures . . . . . . . . . . . . . . . . . . 669
7.3.3 IEEE 1500 Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . 669
7.3.4 IIPS Module Structure . . . . . . . . . . . . . . . . . . . . . . . . . 671
7.3.5 Design of IIPS Security Functions . . . . . . . . . . . . . . . . . 673
7.3.6 Additional Capabilities of the IIPS Unit . . . . . . . . . . . . 674
7.4 Using Classic Methods of Reliable Programming to Design Safe
Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
7.4.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 676
7.4.2 Analysis of the Typical Microcircuit Design Route . . . . 678
7.4.3 Possible Attack Types . . . . . . . . . . . . . . . . . . . . . . . . . 679
7.4.4 Main Differences Between Development of Safe
Microcircuits and Development of Safe Programs . . . . . 680
7.4.5 Lifecycle of Safe Software Development . . . . . . . . . . . . 681
7.4.6 Methods of Safe Microcircuit Design . . . . . . . . . . . . . . 682
7.4.7 Experimental Results of Application of the HTDS
Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
7.4.8 A Brief Overview of Studies Similar to HTDS . . . . . . . 688
7.5 Using Sandbox as a Method of Protection from Hardware
Trojans in SoC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 689
Contents
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Protection from Re-engineering . . . . . . . . . . . . . . . . . . . 638
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 644
7 Countermeasures Against Hardware Trojans . . . . . . . . . . . . . . . . . . 647
7.1 Hardware and Software Methods of Countering Hardware
Trojans in Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
7.1.1 Data Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 647
7.1.2 Protected Architectures on the RTL Level . . . . . . . . . . . 651
7.1.3 Reconfigurable Architectures . . . . . . . . . . . . . . . . . . . . . 652
7.1.4 Replication and Other Protection Methods . . . . . . . . . . . 655
7.2 A Trojan-Resistant System-on-Chip Bus Architecture . . . . . . . . . 657
7.2.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 657
7.2.2 Structure and Operating Principle of a Standard SoC
Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 658
7.2.3 Organization and Operating Principle of Address
Matrix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 659
7.2.4 Structure and Operation Principle of the Arbiter
Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 661
7.2.5 Description of Operation of a System on Chip
Immediately After Detection of a Hardware Trojan . . . . 665
7.3 Using the IEEE Std. 1500 Standard in Order to Ensure Safety
of Systems on Chips . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 667
7.3.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 667
7.3.2 Introduction to IP Infrastructures . . . . . . . . . . . . . . . . . . 669
7.3.3 IEEE 1500 Standard . . . . . . . . . . . . . . . . . . . . . . . . . . . 669
7.3.4 IIPS Module Structure . . . . . . . . . . . . . . . . . . . . . . . . . 671
7.3.5 Design of IIPS Security Functions . . . . . . . . . . . . . . . . . 673
7.3.6 Additional Capabilities of the IIPS Unit . . . . . . . . . . . . 674
7.4 Using Classic Methods of Reliable Programming to Design Safe
Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 676
7.4.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 676
7.4.2 Analysis of the Typical Microcircuit Design Route . . . . 678
7.4.3 Possible Attack Types . . . . . . . . . . . . . . . . . . . . . . . . . 679
7.4.4 Main Differences Between Development of Safe
Microcircuits and Development of Safe Programs . . . . . 680
7.4.5 Lifecycle of Safe Software Development . . . . . . . . . . . . 681
7.4.6 Methods of Safe Microcircuit Design . . . . . . . . . . . . . . 682
7.4.7 Experimental Results of Application of the HTDS
Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 686
7.4.8 A Brief Overview of Studies Similar to HTDS . . . . . . . 688
7.5 Using Sandbox as a Method of Protection from Hardware
Trojans in SoC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 689
Contents
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