6.4.6 Specific Methods of Improving the Quality of IC
Topology Reproduction . . . . . . . . . . . . . . . . . . . . . . . . 564
6.4.7 Description of a Typical System of Reverse
Engineering of Integrated Circuits . . . . . . . . . . . . . . . . . 567
6.5 Methods for Restoring Electrical Circuit from the Microcircuit
Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575
6.5.1 Methods of Automating the Process of Placing
Elements in the Bitmap Image of the Topology . . . . . . . 575
6.5.2 Features of Software Implementation of Recovery
of an Electrical Circuit from the Topology . . . . . . . . . . . 582
6.5.3 Methods of Automating Tracing of the Recovered
Electrical Links Between Elements . . . . . . . . . . . . . . . . 587
6.5.4 Basic Requirements for the Quality of Source Bitmap
Images of the Topology . . . . . . . . . . . . . . . . . . . . . . . . 591
6.6 Methods of Preparing Samples of Submicron Microcircuits
to Be Studied Using Electrophysical SEM Methods . . . . . . . . . . 596
6.6.1 Development of Methods for Preparing Samples
of Submicron Microcircuits to Study These Samples
Using SEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 596
6.6.2 Features of Preparing Chip Samples to Be Studied
by Electrophysical Methods During Sequential
Mechanical and Chemical Removal of Topology
Layers Using Automatic System of Selective
Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 601
6.7 Methods of Counteracting Microcircuit Re-engineering
Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 602
6.7.1 Classification of the Main Methods of Counteracting
Microcircuit Re-engineering . . . . . . . . . . . . . . . . . . . . . 602
6.7.2 Design and Circuitry-Based Methods of Countering
Reverse Engineering of Microcircuits for Military
and Special Applications . . . . . . . . . . . . . . . . . . . . . . . 607
6.7.3 Circuitry-Based Methods of Countering Microcircuit
Re-engineering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 616
6.8 Practical Examples of Implementation of Circuit-Based
Methods of Microcircuit Protection from Re-engineering . . . . . . 623
6.8.1 Integrated Implementation of Embedded Power
Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 623
6.8.2 Non-standard Elements of Protection of Bipolar
Microcircuits from Electrical Overloads and Static
Electricity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 628
6.8.3 Non-standard Elements of Protection of Output
Stages of Microcircuits with Schottky Diodes . . . . . . . . 631
xx
Contents
Topology Reproduction . . . . . . . . . . . . . . . . . . . . . . . . 564
6.4.7 Description of a Typical System of Reverse
Engineering of Integrated Circuits . . . . . . . . . . . . . . . . . 567
6.5 Methods for Restoring Electrical Circuit from the Microcircuit
Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 575
6.5.1 Methods of Automating the Process of Placing
Elements in the Bitmap Image of the Topology . . . . . . . 575
6.5.2 Features of Software Implementation of Recovery
of an Electrical Circuit from the Topology . . . . . . . . . . . 582
6.5.3 Methods of Automating Tracing of the Recovered
Electrical Links Between Elements . . . . . . . . . . . . . . . . 587
6.5.4 Basic Requirements for the Quality of Source Bitmap
Images of the Topology . . . . . . . . . . . . . . . . . . . . . . . . 591
6.6 Methods of Preparing Samples of Submicron Microcircuits
to Be Studied Using Electrophysical SEM Methods . . . . . . . . . . 596
6.6.1 Development of Methods for Preparing Samples
of Submicron Microcircuits to Study These Samples
Using SEM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 596
6.6.2 Features of Preparing Chip Samples to Be Studied
by Electrophysical Methods During Sequential
Mechanical and Chemical Removal of Topology
Layers Using Automatic System of Selective
Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 601
6.7 Methods of Counteracting Microcircuit Re-engineering
Processes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 602
6.7.1 Classification of the Main Methods of Counteracting
Microcircuit Re-engineering . . . . . . . . . . . . . . . . . . . . . 602
6.7.2 Design and Circuitry-Based Methods of Countering
Reverse Engineering of Microcircuits for Military
and Special Applications . . . . . . . . . . . . . . . . . . . . . . . 607
6.7.3 Circuitry-Based Methods of Countering Microcircuit
Re-engineering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 616
6.8 Practical Examples of Implementation of Circuit-Based
Methods of Microcircuit Protection from Re-engineering . . . . . . 623
6.8.1 Integrated Implementation of Embedded Power
Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 623
6.8.2 Non-standard Elements of Protection of Bipolar
Microcircuits from Electrical Overloads and Static
Electricity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 628
6.8.3 Non-standard Elements of Protection of Output
Stages of Microcircuits with Schottky Diodes . . . . . . . . 631
xx
Contents
