5.2.2 Methods of Detecting Hardware Trojans Based on the
Analysis of Electromagnetic Radiation Spectra . . . . . . . . 469
5.2.3 Experimental Results of Method Effectiveness
Verification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 475
5.3 Features of Identifying Sequential Hardware Trojans Using
the TeSR Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 478
5.3.1 Introduction to the Problem . . . . . . . . . . . . . . . . . . . . . 478
5.3.2 Features of Accounting for Process Variation in
Microcircuit Parameters During Implementation of
Trojan Identification Methods . . . . . . . . . . . . . . . . . . . . 481
5.4 Specific Examples from the Experience of Belarusian Trojan
Hunters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 486
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 498
6 Reverse Engineering of Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . 503
6.1 Introduction to the Problem of Reverse Engineering
of Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
6.1.1 Problem Emergence Background, Terms,
and Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504
6.1.2 Standard Implementation Route of the
Reverse-Engineering Process . . . . . . . . . . . . . . . . . . . . . 510
6.1.3 Features of Modern Machinery Production . . . . . . . . . . 512
6.2 Features of Providing Intellectual Property Rights
for Semiconductor Microcircuits . . . . . . . . . . . . . . . . . . . . . . . . 514
6.2.1 Features of Using the Process of Reverse Engineering
for Protection of Patent Rights . . . . . . . . . . . . . . . . . . . 514
6.2.2 Features of the US Semiconductor Chip Protection
Act . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 519
6.3 Basics of Reverse-Engineering Art . . . . . . . . . . . . . . . . . . . . . . . 525
6.3.1 Role and Place of Reverse Engineering in the
Semiconductor Industry . . . . . . . . . . . . . . . . . . . . . . . . 525
6.3.2 Main Stages of Implementation of the Classic Process
of Reverse Engineering of Microelectronic Devices . . . . 526
6.4 Complex Methodology for Reverse Engineering of Microcircuit
Chip Topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547
6.4.1 Comparative Analysis of Microscopic Methods of IC
Topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547
6.4.2 Specific Features of Implementing Frame-by-Frame
Alignment of Topology Fragments . . . . . . . . . . . . . . . . 550
6.4.3 The Method of Implementing the Process of Stacking
Two Frames of an Image Topology . . . . . . . . . . . . . . . . 551
6.4.4 Description of the Process of Aligning a Group of
Image Frames . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 555
6.4.5 Description of the Process of Layer-by-Layer
Overlapping of Chip Topology Layers . . . . . . . . . . . . . 559
Contents
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