Analysis of InN-Based Surrounded Gate Tunnel …
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Figure 5 proves that the vertical e-field reaches its peak in source region. High
electric field for SG-PI-TFET indicates higher tunneling rate traversed from source
to channel.
3.2 Small-Signal Analysis
After establishing the dc biasing, we simulate the small-signal performance of the
proposed device under different V ds . The cut-off frequency [15] is:
f t =
g m
2π(C gs + C gd )
,
where g m is the transconductance of the device; C gs and C gd are capacitance values
between gate-source and gate-drain regions, respectively.
In order to analyze the small-signal characteristics, a 1 MHz source is applied to
the gate varied from 0 to 1 V, C gs and C gd are extracted. C gs and C gd along with g m
are utilized to evaluate (f t ). It is clear [16] that lower gate capacitance, that lower
gate capacitance (C gg = C gs + C gd ) and higher transconductance (g m ) of tunnel FET
help to attain better THz performance.
From Fig. 6a, b, it can be observed that major increase in g m occurs due to
consecutive effect of an increase in tunneling possibility and a reduction of electrons
because of high barrier height at drain-channel region at higher V ds .
The combined effort of reducing C gg and raising g m uplifts the cut-off frequency
f t . Our proposed SG-PI TFET provides a maximum cut-off frequency f t = 0.45 THz
at V ds = 1 V.
Fig. 6 a Transconductance plot for SG-PI-TFET, b total gate-capacitance plot
83
Figure 5 proves that the vertical e-field reaches its peak in source region. High
electric field for SG-PI-TFET indicates higher tunneling rate traversed from source
to channel.
3.2 Small-Signal Analysis
After establishing the dc biasing, we simulate the small-signal performance of the
proposed device under different V ds . The cut-off frequency [15] is:
f t =
g m
2π(C gs + C gd )
,
where g m is the transconductance of the device; C gs and C gd are capacitance values
between gate-source and gate-drain regions, respectively.
In order to analyze the small-signal characteristics, a 1 MHz source is applied to
the gate varied from 0 to 1 V, C gs and C gd are extracted. C gs and C gd along with g m
are utilized to evaluate (f t ). It is clear [16] that lower gate capacitance, that lower
gate capacitance (C gg = C gs + C gd ) and higher transconductance (g m ) of tunnel FET
help to attain better THz performance.
From Fig. 6a, b, it can be observed that major increase in g m occurs due to
consecutive effect of an increase in tunneling possibility and a reduction of electrons
because of high barrier height at drain-channel region at higher V ds .
The combined effort of reducing C gg and raising g m uplifts the cut-off frequency
f t . Our proposed SG-PI TFET provides a maximum cut-off frequency f t = 0.45 THz
at V ds = 1 V.
Fig. 6 a Transconductance plot for SG-PI-TFET, b total gate-capacitance plot