11 Hardware Realization of Arithmetic Operations
255
19
53
113
241
461
977
2011 4051
0
200
400
600
132
588
571
595
523
487
21
20
0
500
625
719
699
552
621
613
584
0
Moduli
Frequency, MHz
Performance comparison of our approach vs. Synopsys for 500-bit inputs
Synopsys Approach
Note that the experiments have been conducted for 40 different values.
The next five plots compare the area of circuits of X(mod P ) (number of cells
from the library cells) for inputs X of 100, 200, 300, 400, and 500 bits, respectively,
using the same moduli as in the experiments for performance.
19
53
113
241
461
977
2011 4051
0
0.5
1
·10
4
6,294
9,085
10,372 9,768
6,846
10,788
7,962
9,362
0
1,392
1,558
1,281
1,281
2,062
2,214
2,083
2,289
0
Moduli
Area, cells
Area (in cells) comparison of our approach vs. Synopsys for 100-bit inputs
Synopsys Approach
The area results show the advantage of the proposed approach which improves
up to 30 times for all moduli and input values.