254
D. Gorodecky and T. Villa
19
53
113
241
461
977
2011 4051
0
200
400
600
800
217
653
632
662
581
507
45
43
0
549
671
746
775
584
680
637
625
0
Moduli
Frequency, MHz
Performance comparison of our approach vs. Synopsys for 300-bit inputs
Synopsys Approach
19
53
113
241
461
977
2011 4051
0
200
400
600
800
168
609
625
621
543
495
28
26
0
549
671
746
775
584
680
637
625
0
Moduli
Frequency, MHz
Performance comparison of our approach vs. Synopsys for 400-bit inputs
Synopsys Approach
The performance results are grouped into three categories:
1. The proposed approach is faster by dozens of times (up to 30 times) for 11- and
12-bit moduli for all ranges of inputs (two right parts of the plots);
2. The proposed approach is faster on average by 15% (up to 300 %) for almost
all 5-bit to 10-bit moduli for all ranges of inputs (central and left parts of the
plots);
3. The proposed approach is slower, with a significant difference only for three
cases (for 5-bit moduli and 100- and 200-bit inputs, and for 9-bit moduli and
10-bit input—75%, 66%, and 67%, respectively), and a minor advantage (up to
5% on average) for 6-bit and 7-bit moduli for 100-bit input, for 6-bit and 9-bit
moduli for 200-bit input.