11 Hardware Realization of Arithmetic Operations
253
Synopsys is the only EDA tool which generates X(mod P ) circuits. We report
results of synthesis using Synopsys 2014 on 28 nm Standard Cell ASIC technology
from United Microelectronics Corporation.
The first five plots compare the latency of circuits of X(mod P ) (in MHz) for
inputs X of 100, 200, 300, 400, and 500 bits, respectively, for moduli P of 19 (5
bits), 53 (6 bits), 113 (7 bits), 241 (8 bits), 461 (9 bits), 997 (10 bits), 2011 (11 bits),
and 4051 (12 bits).
19
53
113
241
461
977
2011 4051
0
500
1,000
1,162
840
819
862
1,099
740
155
142
0
662
746
892
869
657
775
746
709
0
Moduli
Frequency, MHz
Performance comparison of our approach vs. Synopsys for 100-bit inputs
Synopsys Approach
19
53
113
241
461
977
2011 4051
0
500
1,000
970
714
699
719
625
543
70
70
0
581
675
763
819
595
719
680
649
0
Moduli
Frequency, MHz
Performance comparison of our approach vs. Synopsys for 200-bit inputs
Synopsys Approach