5 Crystalline Silicon Solar Cells: Homojunction Cells
107
large. Cell efficiencies were increased from 16.6% (2011) to >22% (2019)
11 in mass
production, thanks to the introduction of HP-mc-Si. Furthermore the variation of
cell efficiencies per ingot was also reduced—with this, the production yield was
improved. Finally, thanks to HP-mc-Si, new cell concepts could be applied, such as
PERC cell technology.
In the production of HP-mc-Si very fine silicon grains of the size 30–300 μm [4]
are sprinkled on the bottom of the crucible as a seed layer. Thereafter, the silicon
pieces (chunks and chips), which are obtained from the Siemens process, are filled in.
The crystallization process starts from the bottom. It is important that the interspersed
silicon grains do not melt completely, but can pass on their crystal structure to the
melt. The small crystalline particles act as a seed for the crystal growth. Additionally
the wall of the crucibles is roughened and coated with SiN, so that the crystal structure
is predetermined in this way. Due to the fact that there are many interfaces, more
than with the conventional multicrystalline production, the thermal stress remains
small and dislocations in the crystal structure occur less frequently. Overall, the cell
efficiency increases compared to the conventional multicrystalline process.
It is interesting that the grains become larger towards the top and so the higher the
crucible is, the larger the grains become, which should actually be avoided because
dislocations can appear [5]. Before the bricks are sawn into wafers, the bottom,
top and sides of the brick have to be cut away because the contaminants are there.
About 20 mm on each side must be separated and one can have non-melting particles
at the bottom of the crucible to replace the silicon particles of the HP process. This
reduces the yield of the process. On the other hand, the square solar cells are obtained
directly from the bricks and the packing density in the module is larger than in the
pseudo-square monocrystalline wafers.
Other Manufacturing Methods
Less common is the use of mono-like multi-material. This process is similar to
that of HP-mc-Si. However, monocrystalline large seed wafers are used. Often, the
centre of the mono-like multi-ingot is monocrystalline, but outside it is multicrystalline. Wafers with both crystal structures are difficult to texture and the process of
optimizing the contact resistance in the presence of grains of different orientation on
the surface represents another difficulty.
Kerf-free technologies are also the subject of research such as
• Controlled cleave with energy beam
• Epitaxy, in which a pure silicon layer is deposited by means of a gas phase, using
e.g. silane (SiH 4 ), on a “dirty” silicon mother wafer lying on a graphite carrier).
The mother wafer can be employed several times. Therefore, it is fabricated with
many small silicon tips, so that the wafer grown on it can be easily removed.
The advantage of such wafers is that full-square monocrystalline wafers can be
produced, which have a larger area than pseudo-square wafers (see Sect. 5.1.2).
The production also requires about 50% less energy than with Cz wafers.
12
11 Trina 21.25% (2015) and Jinko 22.04% (2017).
12 Developed by Nexwave GmbH, Freiburg i.Br. Germany.
107
large. Cell efficiencies were increased from 16.6% (2011) to >22% (2019)
11 in mass
production, thanks to the introduction of HP-mc-Si. Furthermore the variation of
cell efficiencies per ingot was also reduced—with this, the production yield was
improved. Finally, thanks to HP-mc-Si, new cell concepts could be applied, such as
PERC cell technology.
In the production of HP-mc-Si very fine silicon grains of the size 30–300 μm [4]
are sprinkled on the bottom of the crucible as a seed layer. Thereafter, the silicon
pieces (chunks and chips), which are obtained from the Siemens process, are filled in.
The crystallization process starts from the bottom. It is important that the interspersed
silicon grains do not melt completely, but can pass on their crystal structure to the
melt. The small crystalline particles act as a seed for the crystal growth. Additionally
the wall of the crucibles is roughened and coated with SiN, so that the crystal structure
is predetermined in this way. Due to the fact that there are many interfaces, more
than with the conventional multicrystalline production, the thermal stress remains
small and dislocations in the crystal structure occur less frequently. Overall, the cell
efficiency increases compared to the conventional multicrystalline process.
It is interesting that the grains become larger towards the top and so the higher the
crucible is, the larger the grains become, which should actually be avoided because
dislocations can appear [5]. Before the bricks are sawn into wafers, the bottom,
top and sides of the brick have to be cut away because the contaminants are there.
About 20 mm on each side must be separated and one can have non-melting particles
at the bottom of the crucible to replace the silicon particles of the HP process. This
reduces the yield of the process. On the other hand, the square solar cells are obtained
directly from the bricks and the packing density in the module is larger than in the
pseudo-square monocrystalline wafers.
Other Manufacturing Methods
Less common is the use of mono-like multi-material. This process is similar to
that of HP-mc-Si. However, monocrystalline large seed wafers are used. Often, the
centre of the mono-like multi-ingot is monocrystalline, but outside it is multicrystalline. Wafers with both crystal structures are difficult to texture and the process of
optimizing the contact resistance in the presence of grains of different orientation on
the surface represents another difficulty.
Kerf-free technologies are also the subject of research such as
• Controlled cleave with energy beam
• Epitaxy, in which a pure silicon layer is deposited by means of a gas phase, using
e.g. silane (SiH 4 ), on a “dirty” silicon mother wafer lying on a graphite carrier).
The mother wafer can be employed several times. Therefore, it is fabricated with
many small silicon tips, so that the wafer grown on it can be easily removed.
The advantage of such wafers is that full-square monocrystalline wafers can be
produced, which have a larger area than pseudo-square wafers (see Sect. 5.1.2).
The production also requires about 50% less energy than with Cz wafers.
12
11 Trina 21.25% (2015) and Jinko 22.04% (2017).
12 Developed by Nexwave GmbH, Freiburg i.Br. Germany.