10 Signal Processing for Particle Detectors
461
10.5 Gain Mechanisms and Noise in Transistors
10.5.1 Gain Mechanism, Electron Transit Time, Unity-Gain
Frequency
The charge control concept as the basis for the gain mechanism in all three-terminal
amplifying devices (transistors) was discussed in Ref. [9]. The “control charge” Q c
is illustrated in Fig. 10.22.
The relation among the control capacitance C gs , the transconductance g m , the
electron transit time τ e and the unity gain frequency f T is summarized by,
ΔQ c /ΔI d = τ e = C gs ΔV gs /ΔI d = C gs /g m → C gs = g m τ e ,
f T ≈ 1
(2πτ e ) =
1
2π
g m
C gs
.
(10.27)
NMOS transistors in submicron range (channel length below ~0.25 microns) will
have a unity gain frequency in the range 10 to 100 GHz when operated in strong
inversion. These same devices will be operated in weak inversion to maximize
the transconductance/current ratio and the power dissipation in detectors with large
numbers of channels (pixels or strips). This means reduced transconductance with
almost the same gate capacitance resulting in a unity gain frequency in the range of
1 GHz or less. This affects the speed of response and the stability considerations in
the design of feedback amplifiers.
Equation (10.27) describe only a simplified basic relation among intrinsic device
parameters. A very extensive treatment of charge control concepts for CMOS
transistors including parasitic parameters and device operating conditions is given
in Ref. [7].
10.5.2 Noise Sources in MOS Transistor
A brief overview of white noise sources in an NMOS transistor normalized to the
intrinsic channel series noise resistance γ /g ms is illustrated in Fig. 10.20 and Eq.
(10.28) with γ typically in the range 0.5 to 1.0. The second term in Eq. (10.28) is
the gate induced noise contribution [34]. The coefficient δ/5γ depends on the bias
conditions. For estimation purposes (δ/5γ) ~ 1/3. With capacitive sources, such as
most radiation detectors, this term is usually negligible. In particular, at operating
conditions to minimize the power in the input transistor, the optimum ratio C gs /C in is
small. The contributions by the gate resistance and substrate resistance can be made
461
10.5 Gain Mechanisms and Noise in Transistors
10.5.1 Gain Mechanism, Electron Transit Time, Unity-Gain
Frequency
The charge control concept as the basis for the gain mechanism in all three-terminal
amplifying devices (transistors) was discussed in Ref. [9]. The “control charge” Q c
is illustrated in Fig. 10.22.
The relation among the control capacitance C gs , the transconductance g m , the
electron transit time τ e and the unity gain frequency f T is summarized by,
ΔQ c /ΔI d = τ e = C gs ΔV gs /ΔI d = C gs /g m → C gs = g m τ e ,
f T ≈ 1
(2πτ e ) =
1
2π
g m
C gs
.
(10.27)
NMOS transistors in submicron range (channel length below ~0.25 microns) will
have a unity gain frequency in the range 10 to 100 GHz when operated in strong
inversion. These same devices will be operated in weak inversion to maximize
the transconductance/current ratio and the power dissipation in detectors with large
numbers of channels (pixels or strips). This means reduced transconductance with
almost the same gate capacitance resulting in a unity gain frequency in the range of
1 GHz or less. This affects the speed of response and the stability considerations in
the design of feedback amplifiers.
Equation (10.27) describe only a simplified basic relation among intrinsic device
parameters. A very extensive treatment of charge control concepts for CMOS
transistors including parasitic parameters and device operating conditions is given
in Ref. [7].
10.5.2 Noise Sources in MOS Transistor
A brief overview of white noise sources in an NMOS transistor normalized to the
intrinsic channel series noise resistance γ /g ms is illustrated in Fig. 10.20 and Eq.
(10.28) with γ typically in the range 0.5 to 1.0. The second term in Eq. (10.28) is
the gate induced noise contribution [34]. The coefficient δ/5γ depends on the bias
conditions. For estimation purposes (δ/5γ) ~ 1/3. With capacitive sources, such as
most radiation detectors, this term is usually negligible. In particular, at operating
conditions to minimize the power in the input transistor, the optimum ratio C gs /C in is
small. The contributions by the gate resistance and substrate resistance can be made