8 Accelerator Engineering and Technology: Accelerator Technology
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precision network ratio resistors to establish the gain. Presently, the consumer
electronics market offers a range of choice in precision amplifiers, including low
offset, low drift amplifiers that can be used as the output amplifiers in the DCCT.
However, this does not exempt the designer from careful design and implementation
of the output circuit. Parameters such as offset and gain stability, noise, common
mode rejection and output impedance depend strongly on circuit design and
implementation.
8.4.4.2.3 ADCs (Analogue to Digital Converters)
With the advent of digital control, Analogue to Digital Converters have become
essential components for ensuring the accuracy of the current measuring chain
in the control loop of power converters. If in the past, most of the control was
implemented using analogue electronics, in the last couple of decades digital control
has almost completely taken over. The advantages of having a digital representation
of the signal are numerous and not limited to power converter control: calibration,
traditionally done by adjusting gain and offset potentiometers, is now performed
using calibration constants which can be memorised and used to correct the output
of the measuring device. If these constants are also kept in a database and updated
whenever a calibration takes place, the task of following the behaviour of high
precision devices becomes much simpler and less error prone. Another advantage
is the possibility of using correction algorithms. A typical example is the use of
a temperature sensor and a correction algorithm to correct for the temperature
dependency of a measurement device.
ADC technology has significantly evolved in the last couple of decades fuelled
mainly by the telecommunications industry. As a consequence, a wide range of
solutions in AD conversion are available on the market with tradeoffs in resolution,
speed and accuracy. In power converter control for accelerators, ADC speeds
above the MHz are seldom required. As for resolution, requirements often range
from 16 bits to 24 bits with accuracy following along. In this context Successive
Approximation Register ADCs (SAR) have recently become of the most interesting
technologies to follow as they are now competing with Delta Sigma ADCs and multi
slope integrating ADCs in the high resolution, high accuracy segment. However, to
reach effective resolution figures beyond 20 bits, they must operate in oversampling
mode. Some ICs have built-in provisions for it, while for others it has to be
implemented in external logic [87]. Therefore, Delta Sigma ADCs still remain
the most commonly used solution in the segment. They do not require external
components, their oversampled nature simplifies circuit design by relaxing the
requirements of the analogue anti-aliasing filter and they are often simpler to
drive than SARs. However, higher accuracy also requires more complex digital
decimation filters which, for linear phase FIR filters, corresponds to increased
latency. Filter latency limits the maximum loop bandwidth which means that high
accuracy is normally associated with lower speed. The use of minimum phase FIR
filters can substantially decrease latency.
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