TABLe 3.1
Grant Signal Generation Logic
sel [1]
sel [0]
out1
out2
out3
g1
g2
g3
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
0
0
0
1
0
0
0
1
0
0
0
1
0
1
0
0
0
0
0
1
0
0
1
0
0
0
1
0
0
1
0
0
0
0
0
1
0
0
0
1
0
0
1
0
0
1
0
0
In1, In2, In3
In2, In3, In1
In3, In1, In2
req1

gnt2
In1

gnt3

req2
gnt1
In2
gnt3
req3
gnt1
In3
gnt2
gnt3 gnt2 gnt1
mux_out [2:0]
mux_out [1]
Priority
mux_out [2] in1
out1
1
in2
logic
FF
FF
FF
LUT
in3
out2
out3
out3
out2
out1
mux_out [0]
Sel [1:0]
00
10
01
0
2
g3
g2
g1
62
Network-on-Chip
Figure 3.9
Round-robin arbiter.
The control units generate the read enable and write enable signals for the
FIFOs and also send a request signal to the previous router for incoming flits.
After coming out from the IB, the header flit of any packet goes to the RC for
generating a request signal by executing the routing algorithm to access an
outgoing physical channel. If more than one request signal tries to access
the same outgoing physical channel simultaneously, the SA selects one of
them in a round-robin fashion to avoid starvation and sends a grant signal