eop (1-bit) bop (1-bit) (2-bit)
(2-bit)
(13-bit)
(13-bit)
0
1
Header flit
vc_id
Unused Source core address Destination core address
…
0
…
…
0
…
…
Payload flit
…
1
0
Tailer flit
1
1
Invalid flit
54
Network-on-Chip
Figure 3.1
Packet format for a 4 × 4 MoT-based network.
requires 13 bits. Hence the header flit consists of 13-bit destination core
address, 13-bit source core address, 2 optional bits for supporting different
traffic classes (unused here), 2 bits for VC identification (vc_id), and 2 bits for
packet framing: end-of-packet (eop) and begin-of-packet (bop). The vc_id bits
are used only for VC-based routers. In wormhole router architecture, these
two bits are also left unused. The packet format is shown in Figure 3.1. The
eop and bop bits identify the type of the flits: eop = 0, bop = 1 denotes the
header flit; eop = 0, bop = 0 denotes the payload flit; eop = 1, bop = 0 denotes
the tailer flit; eop = 1, bop = 1 denotes the invalid flit.
3.3 Asynchronous FIFO Design
In NoC, the cores and routers are operating at their own clock frequencies
and there is, as such, no dependency between these clocks. Moreover, the
inter-router communication should support mesochronous clocking strategy where the clock frequency for each router is the same but phases may
vary. Therefore, to start with the router design, it is essential to design a
low-latency FIFO with independent read and write clocks. The major challenge of dual-clock asynchronous FIFO is that the FULL and EMPTY signals
of the FIFO are dependent on both the clocks. Synchronization of a binary
count value from one clock domain to another is problematic because more
than one bit of an n-bit counter may change at a time, which may cause glitch
in FULL and EMPTY signals. Thus a binary counter-based FIFO is inefficient. In gray code, only one bit changes in each clock. Thus synchronization
from one clock domain to another becomes simpler. Cummings (2002) and
Cummings and Alfke (2002) implemented the gray-code counter-based FIFO
capable of handling metastability. In a mod-N gray counter, N is an integral
power of 2. But if N is a nonintegral power of 2 (2 m – N), buffer locations will
be wasted, where m = log 2 N. A scalable gray code concept has been proposed
by Jiang (2004) and Cheng (2004) to solve this problem. In this technique, for
a mod-N gray counter, first the difference of (2 m – N) is obtained. Now there