350
Network-on-Chip
TABLe 11.11
Simulation Results of All 3D NoCs under Consideration for DVOPD Application
Average Overall Latency
Total Energy Consumption
Networks
(Cycle)
(μJ)
Mesh-1
93.98
59.36
Mesh-2
94.53
46.71
BFT
96.61
42.49
MoT
95.47
47.25
Evolution of better mapping algorithm for all the networks will definitely
improve the mapping solution. However, we do not address the issue in
this work.
11.4 Summary
In this chapter, we have proposed a 3D MoT topology and applied it in 3D
NoC design. The performance and cost of the proposed MoT-based 3D NoC
have been evaluated by applying a self-similar traffic and compared with a
well-known tree-based topology, BFT, and two variants of mesh topology
connecting single or two cores to each router. For uniformly distributed and
less localized traffic condition, the throughput and latency values obtained
for MoT are better than all other topologies excepting Mesh-1. However, at
highly localized traffic condition, both Mesh-2 and MoT perform equally
well, as both of them are having a single destination core in their local clusters. The area overhead of 3D MoT network is lesser than those of 3D BFT and
3D Mesh-2 structures. Moreover, for a 32-core-based system, MoT shows the
least average packet energy consumption, almost similar to 3D Mesh-2 network. Thus, taking performance and cost into consideration, MoT appears to
be a very competitive topology among the alternatives proposed in the literature. The MoT network has also been evaluated and compared with other
topologies under a real benchmark application, DVOPD. The comparative
study shows that MoT-based 3D NoC also works fine under an applicationspecific traffic. On the architecture front of the wormhole router, due to lesser
connectivity of MoT routers, synthesis result (Table 11.2) shows that they can
be operated at a higher frequency than other networks, thus increasing the
speed of the overall network. However, for a system with large number of
cores, like other tree-based topologies, MoT will also suffer from the large
number of pipelining stages required for the longer edges in each silicon
layer. Adopting current mode signaling in NoC link and usage of photonic
interconnects in 3D NoC are expected to alleviate this bottleneck, making
MoT a more acceptable topology for larger core-based 3D NoC design.
Network-on-Chip
TABLe 11.11
Simulation Results of All 3D NoCs under Consideration for DVOPD Application
Average Overall Latency
Total Energy Consumption
Networks
(Cycle)
(μJ)
Mesh-1
93.98
59.36
Mesh-2
94.53
46.71
BFT
96.61
42.49
MoT
95.47
47.25
Evolution of better mapping algorithm for all the networks will definitely
improve the mapping solution. However, we do not address the issue in
this work.
11.4 Summary
In this chapter, we have proposed a 3D MoT topology and applied it in 3D
NoC design. The performance and cost of the proposed MoT-based 3D NoC
have been evaluated by applying a self-similar traffic and compared with a
well-known tree-based topology, BFT, and two variants of mesh topology
connecting single or two cores to each router. For uniformly distributed and
less localized traffic condition, the throughput and latency values obtained
for MoT are better than all other topologies excepting Mesh-1. However, at
highly localized traffic condition, both Mesh-2 and MoT perform equally
well, as both of them are having a single destination core in their local clusters. The area overhead of 3D MoT network is lesser than those of 3D BFT and
3D Mesh-2 structures. Moreover, for a 32-core-based system, MoT shows the
least average packet energy consumption, almost similar to 3D Mesh-2 network. Thus, taking performance and cost into consideration, MoT appears to
be a very competitive topology among the alternatives proposed in the literature. The MoT network has also been evaluated and compared with other
topologies under a real benchmark application, DVOPD. The comparative
study shows that MoT-based 3D NoC also works fine under an applicationspecific traffic. On the architecture front of the wormhole router, due to lesser
connectivity of MoT routers, synthesis result (Table 11.2) shows that they can
be operated at a higher frequency than other networks, thus increasing the
speed of the overall network. However, for a system with large number of
cores, like other tree-based topologies, MoT will also suffer from the large
number of pipelining stages required for the longer edges in each silicon
layer. Adopting current mode signaling in NoC link and usage of photonic
interconnects in 3D NoC are expected to alleviate this bottleneck, making
MoT a more acceptable topology for larger core-based 3D NoC design.